嵌入式教程ET1:低差(LDO)稳压器的极零分析:教程概述

A. Garimella, Punith R. Surkanti, P. Furth
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引用次数: 2

摘要

仅给出摘要形式:我们在本教程中讨论低差(LDO)稳压器极零分析。在实现晶体管级设计之前,对极点和零点的先验知识有助于选择正确的拓扑结构和适当的频率补偿技术,因为极点的位置随着输出负载电流的移动而移动。本教程的目的是提供一个逐步分析LDO稳压器中的极点和零点的过程。为此,从文献中分析了两个最近最先进的LDO调节器,解释了涉及的几个复杂性。我们解释了逐步开发小信号模型的过程,打破电压/电流环和快速到达简单和近似的极零方程的技术。在此过程中,阐述了几种频率补偿技术。所导出的极点和零点解析表达式有助于对电路行为的直观理解。
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Embedded Tutorial ET1: Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview
Summary form only given: We discuss the low-dropout (LDO) voltage regulator pole-zero analysis in this tutorial. A priori knowledge of poles and zeros assist in choosing the right topology and appropriate frequency compensation techniques before implementing the transistor level design, as the location of poles move with output load current. The objective of this tutorial is to provide a step-by-step procedure for analyzing poles and zeros in LDO regulators. To this end, two recent state-of-the-art LDO regulators from the literature are analyzed, explaining several intricacies involved. We explain step-by-step procedure in developing the small-signal model, breaking the voltage/current loop and techniques for quickly arriving at simple and approximate pole-zero equations. During the process, several frequency compensation techniques are elucidated. The derived analytic expressions for poles and zeros help in developing intuition of circuit behavior.
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