Analog macrocell layout generation

An object-oriented imaging model that automatically generates the physical layout of commonly used analog circuit macrocells based on input from an annotated net list is discussed. It provides information on constructed cells sufficient for parasitic element extraction. the imaging model is technology independent within fundamental process families (CMOS, bipolar, etc.) and currently includes a library of CMOS analog macrocells and associated physical templates. Templates are described by synthesis rules and graphics operators for two-dimensional shape generation.<>