H. Kamitsuna, Y. Yamane, M. Tokumitsu, H. Sugahara, T. Enoki
{"title":"用于10gbit /s系统的集成8个InP-HEMT SP8T交换机的8×8开关矩阵MMIC","authors":"H. Kamitsuna, Y. Yamane, M. Tokumitsu, H. Sugahara, T. Enoki","doi":"10.1109/EMICC.2006.282807","DOIUrl":null,"url":null,"abstract":"An 8times8 switch matrix MMIC using cold-FET SP8T switches is presented. InP HEMTs with a low RonmiddotCoff product enable us to construct a dc-to-over-10-GHz SP8T switch in a series configuration. The multilayer interconnection with top-metal- and dielectric-layer thickness of 5 mum allows us to configure interconnection transmission lines quite compactly, which is essential for wideband operation. The switch matrix IC using these technologies with a novel size-reduction technique is as small as 0.4 mm2 (core area) and achieves low insertion loss (<3.9 dB) and high isolation (>26.5 dB) below 10 GHz. We confirmed error-free operation up to 12.5 Gbit/s with good eye openings even when eight data signals are simultaneously input to the switch IC","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An 8×8 Switch Matrix MMIC Integrating Eight InP-HEMT SP8T Switches for 10-Gbit/s Systems\",\"authors\":\"H. Kamitsuna, Y. Yamane, M. Tokumitsu, H. Sugahara, T. Enoki\",\"doi\":\"10.1109/EMICC.2006.282807\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An 8times8 switch matrix MMIC using cold-FET SP8T switches is presented. InP HEMTs with a low RonmiddotCoff product enable us to construct a dc-to-over-10-GHz SP8T switch in a series configuration. The multilayer interconnection with top-metal- and dielectric-layer thickness of 5 mum allows us to configure interconnection transmission lines quite compactly, which is essential for wideband operation. The switch matrix IC using these technologies with a novel size-reduction technique is as small as 0.4 mm2 (core area) and achieves low insertion loss (<3.9 dB) and high isolation (>26.5 dB) below 10 GHz. We confirmed error-free operation up to 12.5 Gbit/s with good eye openings even when eight data signals are simultaneously input to the switch IC\",\"PeriodicalId\":269652,\"journal\":{\"name\":\"2006 European Microwave Integrated Circuits Conference\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 European Microwave Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EMICC.2006.282807\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 European Microwave Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EMICC.2006.282807","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An 8×8 Switch Matrix MMIC Integrating Eight InP-HEMT SP8T Switches for 10-Gbit/s Systems
An 8times8 switch matrix MMIC using cold-FET SP8T switches is presented. InP HEMTs with a low RonmiddotCoff product enable us to construct a dc-to-over-10-GHz SP8T switch in a series configuration. The multilayer interconnection with top-metal- and dielectric-layer thickness of 5 mum allows us to configure interconnection transmission lines quite compactly, which is essential for wideband operation. The switch matrix IC using these technologies with a novel size-reduction technique is as small as 0.4 mm2 (core area) and achieves low insertion loss (<3.9 dB) and high isolation (>26.5 dB) below 10 GHz. We confirmed error-free operation up to 12.5 Gbit/s with good eye openings even when eight data signals are simultaneously input to the switch IC
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