Trace Signal Selection based on the Merging of Flip-flops with Maximum Restoration

The most expensive task in modern design methodology is Post-silicon validation. As per the International Technology Roadmap for Semiconductors, time to market is the major limitation for verification and validation techniques. Functional verification is one of the major tasks in pre-silicon verification. The errors that are escaped from pre-silicon should be eliminated by post-silicon phase. The primary problem governing in silicon verification is that it has limited visibility of internal signals. This can be improved by the proposed merging concept of flip-flops which gives high observability with maximum restoration.