Kyeong‐Eun Han, Jongtae Song, JiWook Youn, Dae-Ub Kim, Kwangjoon Kim
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Two-stage Pipelined Parallel Matching Scheduler for VOQ-based Input-buffered Switches
We propose a two-stage pipelined parallel matching scheduler for alleviated scheduling time constraint. TPPM with pGA provides ~100% throughput and maximum ~42% less queuing delay when offered load is above 0.6 than single DRRM scheduler.
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