{"title":"一种用于射频功率放大器数字预失真模型识别的2.0-2.5 GHz频率可选振荡器","authors":"Kevin McGrath, A. Zhu","doi":"10.1109/INMMIC.2017.7927294","DOIUrl":null,"url":null,"abstract":"This paper presents the design of a frequency selectable oscillator used as part of a new data acquisition architecture for digital predistortion (DPD) of RF power amplifiers (PAs). The proposed architecture aims to alleviate the requirement of high sampling rate analog-to-digital-converters (ADCs) in the data acquisition loop. The oscillator utilizes switchable capacitors with a digital control scheme and is capable of operating between 2.0 GHz and 2.5 GHz with an approximate frequency step size of 512 kHz.","PeriodicalId":322300,"journal":{"name":"2017 Integrated Nonlinear Microwave and Millimetre-wave Circuits Workshop (INMMiC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 2.0–2.5 GHz frequency-selectable oscillator for digital predistortion model identification of RF power amplifiers\",\"authors\":\"Kevin McGrath, A. Zhu\",\"doi\":\"10.1109/INMMIC.2017.7927294\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design of a frequency selectable oscillator used as part of a new data acquisition architecture for digital predistortion (DPD) of RF power amplifiers (PAs). The proposed architecture aims to alleviate the requirement of high sampling rate analog-to-digital-converters (ADCs) in the data acquisition loop. The oscillator utilizes switchable capacitors with a digital control scheme and is capable of operating between 2.0 GHz and 2.5 GHz with an approximate frequency step size of 512 kHz.\",\"PeriodicalId\":322300,\"journal\":{\"name\":\"2017 Integrated Nonlinear Microwave and Millimetre-wave Circuits Workshop (INMMiC)\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 Integrated Nonlinear Microwave and Millimetre-wave Circuits Workshop (INMMiC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/INMMIC.2017.7927294\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Integrated Nonlinear Microwave and Millimetre-wave Circuits Workshop (INMMiC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INMMIC.2017.7927294","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 2.0–2.5 GHz frequency-selectable oscillator for digital predistortion model identification of RF power amplifiers
This paper presents the design of a frequency selectable oscillator used as part of a new data acquisition architecture for digital predistortion (DPD) of RF power amplifiers (PAs). The proposed architecture aims to alleviate the requirement of high sampling rate analog-to-digital-converters (ADCs) in the data acquisition loop. The oscillator utilizes switchable capacitors with a digital control scheme and is capable of operating between 2.0 GHz and 2.5 GHz with an approximate frequency step size of 512 kHz.
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