SOPC based sigma delta ADC IP core for smart energy meter

Global energy crisis has triggered the onset of technologies which can improve energy efficiency, reduce wastage and control the usage. Generation, distribution and transmission of electrical energy have undergone an evolution over the past few decades by incorporating the most modern digital technologies into traditional electrical grids thereby making it smart. Compared to conventional metering techniques, smart meters ensure active participation of consumers in energy conservation by providing a real time feedback on their energy consumption. This paper details the implementation of sigma delta architecture for the analog to digital conversion module in smart meters. Filters in ADC has been designed in MATLAB and coded in VHDL. Sigma delta ADC has been implemented in FPGA using the LVDS feature. The paper also proposes a System-On-a-Programmable Chip (SOPC) based architecture for smart meters. Sigma delta ADC has been added as an IP core in the Altera FPGA component library and used as a building block in the proposed SOPC based smart meter design.