混合信号集成电路的模拟信号计量

Proceedings Sixth Asian Test Symposium (ATS'97) Pub Date : 1997-11-17 DOI:10.1109/ATS.1997.643958

C. Su, Yi-Ren Cheng, Yue-Tsang Chen, Shing Tenchen

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引用次数: 0

摘要

信号重构将一个多周期低速率采样波形重构为一个单周期高速率采样波形。有了它，我们能够使用片上adc为基于DSP的测试提供足够的模拟信号样本。测试结果表明，用20mhz 8位ADC采样的每周期2.4个采样的波形可以重构出每周期128个采样的波形。

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Analog signal metrology for mixed signal ICs

Signal reconstruction reconstructs a multiple period low-rate sampled waveform into a one-period high-rate sampled waveform. With which, we are able to provide sufficient samples of analog signals for DSP based testing using on-chip ADCs. Test results show that a 128-sample-per-period waveform can be reconstructed from a 2.4 samples per period waveform sampled by a 20 MHz 8-bit ADC.

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Proceedings Sixth Asian Test Symposium (ATS'97)

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