V. Yeh, C. Huang, Chia-Huang Fu, Chieh‐Hung Chen, Tsong-Lin Lee, Hsiang-Hui Chang, Tsung-Yao Lin, Yung-Chun Lei
{"title":"一种电流为10ma,灵敏度为1.1 μ v的单片机调频无线电接收机","authors":"V. Yeh, C. Huang, Chia-Huang Fu, Chieh‐Hung Chen, Tsong-Lin Lee, Hsiang-Hui Chang, Tsung-Yao Lin, Yung-Chun Lei","doi":"10.1109/ASSCC.2006.357847","DOIUrl":null,"url":null,"abstract":"Modern FM radio receiver on portable devices requires low power consumption, small size and good audio performance. This paper reports a highly integrated FM radio single-chip receiver optimized for low power consumption and minimum external components. The operating frequency is 76 MHz ~ 108 MHz which covers EURO/US/Japan FM bands. The chip integrates all essential RF front-end circuits including LNA and mixer with automatic gain control (AGC), and mixed-signal functional blocks such as channel filter, limiting amplifier, integrated FM demodulator, stereo decoder, and integrated frequency locked loop (FLL). The total current consumption is only 10 mA off 2.8 V while maintaining sensitivity as low as 1.1 μV. The audio signal-to-noise ratio (SNR) is 58 dB. Total harmonic distortion (THD) is less than 0.4 % and the stereo audio separation (SEP) is more than 30 dB. This chip is fabricated in 0.35 μm BiCMOS process and packaged in 28-pin 4×4 mm2 LGA.","PeriodicalId":142478,"journal":{"name":"2006 IEEE Asian Solid-State Circuits Conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A 10-mA Current and 1.1-μV Sensitivity Single-Chip FM Radio Receiver\",\"authors\":\"V. Yeh, C. Huang, Chia-Huang Fu, Chieh‐Hung Chen, Tsong-Lin Lee, Hsiang-Hui Chang, Tsung-Yao Lin, Yung-Chun Lei\",\"doi\":\"10.1109/ASSCC.2006.357847\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Modern FM radio receiver on portable devices requires low power consumption, small size and good audio performance. This paper reports a highly integrated FM radio single-chip receiver optimized for low power consumption and minimum external components. The operating frequency is 76 MHz ~ 108 MHz which covers EURO/US/Japan FM bands. The chip integrates all essential RF front-end circuits including LNA and mixer with automatic gain control (AGC), and mixed-signal functional blocks such as channel filter, limiting amplifier, integrated FM demodulator, stereo decoder, and integrated frequency locked loop (FLL). The total current consumption is only 10 mA off 2.8 V while maintaining sensitivity as low as 1.1 μV. The audio signal-to-noise ratio (SNR) is 58 dB. Total harmonic distortion (THD) is less than 0.4 % and the stereo audio separation (SEP) is more than 30 dB. This chip is fabricated in 0.35 μm BiCMOS process and packaged in 28-pin 4×4 mm2 LGA.\",\"PeriodicalId\":142478,\"journal\":{\"name\":\"2006 IEEE Asian Solid-State Circuits Conference\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2006.357847\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2006.357847","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 10-mA Current and 1.1-μV Sensitivity Single-Chip FM Radio Receiver
Modern FM radio receiver on portable devices requires low power consumption, small size and good audio performance. This paper reports a highly integrated FM radio single-chip receiver optimized for low power consumption and minimum external components. The operating frequency is 76 MHz ~ 108 MHz which covers EURO/US/Japan FM bands. The chip integrates all essential RF front-end circuits including LNA and mixer with automatic gain control (AGC), and mixed-signal functional blocks such as channel filter, limiting amplifier, integrated FM demodulator, stereo decoder, and integrated frequency locked loop (FLL). The total current consumption is only 10 mA off 2.8 V while maintaining sensitivity as low as 1.1 μV. The audio signal-to-noise ratio (SNR) is 58 dB. Total harmonic distortion (THD) is less than 0.4 % and the stereo audio separation (SEP) is more than 30 dB. This chip is fabricated in 0.35 μm BiCMOS process and packaged in 28-pin 4×4 mm2 LGA.