{"title":"2 × 512复用元件的CCD模拟延迟线","authors":"A. Astier","doi":"10.1109/ESSCIRC.1980.5468809","DOIUrl":null,"url":null,"abstract":"This CCD consists of two identical, independent 512-element registers, and uses buried N-channel polysilicon technology. Designed for analog signal processing at audio to video frequencies, it features easy operation.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"79 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"CCD Analog Delay Line with 2 × 512 Multiplexed Elements\",\"authors\":\"A. Astier\",\"doi\":\"10.1109/ESSCIRC.1980.5468809\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This CCD consists of two identical, independent 512-element registers, and uses buried N-channel polysilicon technology. Designed for analog signal processing at audio to video frequencies, it features easy operation.\",\"PeriodicalId\":168272,\"journal\":{\"name\":\"ESSCIRC 80: 6th European Solid State Circuits Conference\",\"volume\":\"79 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1980-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 80: 6th European Solid State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1980.5468809\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 80: 6th European Solid State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1980.5468809","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
CCD Analog Delay Line with 2 × 512 Multiplexed Elements
This CCD consists of two identical, independent 512-element registers, and uses buried N-channel polysilicon technology. Designed for analog signal processing at audio to video frequencies, it features easy operation.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
