{"title":"标准可测试性总线—一个应用程序示例","authors":"J. Turino","doi":"10.1109/IMTC.1990.65961","DOIUrl":null,"url":null,"abstract":"An application of a standard testability bus to the design of a next-generation automatic test system is described. The target system that must be made testable consists of multiple printed circuit boards that can be functionally reconfigured at start-up time via downloading of specific operating parameters to the on-board RAM. The result of the application was the ability to meet the system-level testability specifications, while at the same time reducing the time and cost associated with design verification, logic and fault simulation, capital equipment cost for external ATE (automatic test equipment), and on-going factory and field testing and troubleshooting.<<ETX>>","PeriodicalId":404761,"journal":{"name":"7th IEEE Conference on Instrumentation and Measurement Technology","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Standard testability bus-an applications example\",\"authors\":\"J. Turino\",\"doi\":\"10.1109/IMTC.1990.65961\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An application of a standard testability bus to the design of a next-generation automatic test system is described. The target system that must be made testable consists of multiple printed circuit boards that can be functionally reconfigured at start-up time via downloading of specific operating parameters to the on-board RAM. The result of the application was the ability to meet the system-level testability specifications, while at the same time reducing the time and cost associated with design verification, logic and fault simulation, capital equipment cost for external ATE (automatic test equipment), and on-going factory and field testing and troubleshooting.<<ETX>>\",\"PeriodicalId\":404761,\"journal\":{\"name\":\"7th IEEE Conference on Instrumentation and Measurement Technology\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-02-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"7th IEEE Conference on Instrumentation and Measurement Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMTC.1990.65961\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th IEEE Conference on Instrumentation and Measurement Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMTC.1990.65961","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An application of a standard testability bus to the design of a next-generation automatic test system is described. The target system that must be made testable consists of multiple printed circuit boards that can be functionally reconfigured at start-up time via downloading of specific operating parameters to the on-board RAM. The result of the application was the ability to meet the system-level testability specifications, while at the same time reducing the time and cost associated with design verification, logic and fault simulation, capital equipment cost for external ATE (automatic test equipment), and on-going factory and field testing and troubleshooting.<>