{"title":"单相h桥PFC变换器的占空补偿降谐波控制","authors":"U. Sankar, Ayan Mallik, A. Khaligh","doi":"10.1109/APEC.2018.8341291","DOIUrl":null,"url":null,"abstract":"A power factor correction (PFC) circuit is an essential requirement for AC-DC conversion to meet the strict grid quality standards. High efficiency and increased power density requirements have driven the industry towards bridgeless PFC circuits as a viable solution for front end rectification. Inherent electro magnetic interference (EMI) issues of an H-Bridge PFC topology has hindered the adaptation of this circuit. In this paper, a duty compensation method is proposed to reduce the harmonic content generated by switch node of an H-Bridge topology. The proposed control technique reduces the generated harmonics without addition of any hardware components helping to meet high power density requirements. A 1kW SiC-based laboratory prototype is designed to verify the proposed control technique. The experimental results show that an input power factor of 0.99 with a conversion efficiency of 96.5% and total harmonic distortion (THD) of 2.05 % can be achieved.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Duty compensated reduced harmonic control for a single-phase H-bridge PFC converter\",\"authors\":\"U. Sankar, Ayan Mallik, A. Khaligh\",\"doi\":\"10.1109/APEC.2018.8341291\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A power factor correction (PFC) circuit is an essential requirement for AC-DC conversion to meet the strict grid quality standards. High efficiency and increased power density requirements have driven the industry towards bridgeless PFC circuits as a viable solution for front end rectification. Inherent electro magnetic interference (EMI) issues of an H-Bridge PFC topology has hindered the adaptation of this circuit. In this paper, a duty compensation method is proposed to reduce the harmonic content generated by switch node of an H-Bridge topology. The proposed control technique reduces the generated harmonics without addition of any hardware components helping to meet high power density requirements. A 1kW SiC-based laboratory prototype is designed to verify the proposed control technique. The experimental results show that an input power factor of 0.99 with a conversion efficiency of 96.5% and total harmonic distortion (THD) of 2.05 % can be achieved.\",\"PeriodicalId\":113756,\"journal\":{\"name\":\"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"volume\":\"107 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-04-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APEC.2018.8341291\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.2018.8341291","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Duty compensated reduced harmonic control for a single-phase H-bridge PFC converter
A power factor correction (PFC) circuit is an essential requirement for AC-DC conversion to meet the strict grid quality standards. High efficiency and increased power density requirements have driven the industry towards bridgeless PFC circuits as a viable solution for front end rectification. Inherent electro magnetic interference (EMI) issues of an H-Bridge PFC topology has hindered the adaptation of this circuit. In this paper, a duty compensation method is proposed to reduce the harmonic content generated by switch node of an H-Bridge topology. The proposed control technique reduces the generated harmonics without addition of any hardware components helping to meet high power density requirements. A 1kW SiC-based laboratory prototype is designed to verify the proposed control technique. The experimental results show that an input power factor of 0.99 with a conversion efficiency of 96.5% and total harmonic distortion (THD) of 2.05 % can be achieved.