Huan-Chien Yang, H. Huang, Chi-Lin Chen, Ming-Hsin Huang, Ke-Horng Chen
{"title":"无电容LDO稳压器中自适应调节相位裕度的电流反馈补偿技术","authors":"Huan-Chien Yang, H. Huang, Chi-Lin Chen, Ming-Hsin Huang, Ke-Horng Chen","doi":"10.1109/MWSCAS.2008.4616722","DOIUrl":null,"url":null,"abstract":"Current feedback compensation technique (CFC) can adaptively adjust the phase margin for achieving better transient response than that with variant phase margin at different load current conditions. Not only fast transient response is attained due to suitable phase margin but also the minimum load current limitation can be greatly reduced to about 50 muA without sacrificing bandwidth at light load current condition. Besides, CFC technique can have high PSRR bandwidth with compatible compensation capacitors compared to the Q-reduction technique (Lau, 2007). The capacitor-free LDO regulator with CFC technique is fabricated by TSMC 0.35 mum 2P4M CMOS process with small compensation capacitors 5pF and 1.5 pF. Experimental results demonstrate that the minimum load can be reduced to 50 muA and transient response time with adaptively phase margin control is smaller than 1 mus.","PeriodicalId":118637,"journal":{"name":"2008 51st Midwest Symposium on Circuits and Systems","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Current feedback compensation (CFC) technique for adaptively adjusting the phase margin in capacitor-free LDO regulators\",\"authors\":\"Huan-Chien Yang, H. Huang, Chi-Lin Chen, Ming-Hsin Huang, Ke-Horng Chen\",\"doi\":\"10.1109/MWSCAS.2008.4616722\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Current feedback compensation technique (CFC) can adaptively adjust the phase margin for achieving better transient response than that with variant phase margin at different load current conditions. Not only fast transient response is attained due to suitable phase margin but also the minimum load current limitation can be greatly reduced to about 50 muA without sacrificing bandwidth at light load current condition. Besides, CFC technique can have high PSRR bandwidth with compatible compensation capacitors compared to the Q-reduction technique (Lau, 2007). The capacitor-free LDO regulator with CFC technique is fabricated by TSMC 0.35 mum 2P4M CMOS process with small compensation capacitors 5pF and 1.5 pF. Experimental results demonstrate that the minimum load can be reduced to 50 muA and transient response time with adaptively phase margin control is smaller than 1 mus.\",\"PeriodicalId\":118637,\"journal\":{\"name\":\"2008 51st Midwest Symposium on Circuits and Systems\",\"volume\":\"75 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-09-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 51st Midwest Symposium on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2008.4616722\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 51st Midwest Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2008.4616722","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Current feedback compensation (CFC) technique for adaptively adjusting the phase margin in capacitor-free LDO regulators
Current feedback compensation technique (CFC) can adaptively adjust the phase margin for achieving better transient response than that with variant phase margin at different load current conditions. Not only fast transient response is attained due to suitable phase margin but also the minimum load current limitation can be greatly reduced to about 50 muA without sacrificing bandwidth at light load current condition. Besides, CFC technique can have high PSRR bandwidth with compatible compensation capacitors compared to the Q-reduction technique (Lau, 2007). The capacitor-free LDO regulator with CFC technique is fabricated by TSMC 0.35 mum 2P4M CMOS process with small compensation capacitors 5pF and 1.5 pF. Experimental results demonstrate that the minimum load can be reduced to 50 muA and transient response time with adaptively phase margin control is smaller than 1 mus.