对纳米细胞模型进行全能和致命的训练,以模拟逻辑门的功能

P. Jha, V. Sahula
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摘要

各种不可避免的限制(即物理,技术和财务)限制了通过缩小使用传统硅技术的设备来实现持续改进计算能力的可能性。分子电子学的目标是使用自下而上的方法从基本分子单位构建纳米级器件,并承诺每美元瓦特平方厘米的计算水平不可预见。分子的可编程特性被用来规避可寻址性问题。纳米细胞的概念是基于一种信念,即自组装分子的随机分布可以被编程来执行特定的逻辑功能。在本文中,我们提出了一种新颖的方法来证明“从无序中创造功能”的想法的合理性。实验结果证明了训练纳米细胞执行逻辑运算的可行性。一个负差分电阻(NDR)电路被设计用来模拟连接在实际纳米电池中任何一对节点之间的分子开关的Λ-type I-V特性。然后以这种NDR电路为实例构建纳米细胞模型。作为纳米细胞概念的初步探索,我们考虑了全能编程。然后将HSPICE模拟的结果馈送到MATLAB中的遗传算法(GA)求解器中,为我们提供NDR电路的优化配置(或开关状态的组合),其中纳米细胞模型产生一个或多个目标逻辑器件的功能。最后,人类编程也完成了。再次使用遗传求解器为我们提供应该施加在纳米电池的每个外部节点(除了输入和输出节点)上的电压,以产生类似于NAND门的响应。
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Omnipotent and mortal training of a nanocell model to emulate the functionality of a logic gate
Various unavoidable constraints (viz. physical, technical and financial) curtail the possibility of achieving continuous improvement in the computing capabilities through scaling down of devices using the conventional silicon technology. Molecular electronics aims to use the bottom-up approach to build nanoscale devices from basic molecular unit and promises unforeseen levels of computing per dollar-watt-cm2. The programmability feature of molecules is exploited to circumvent the problem of addressability. The nanocell concept is predicated on the belief that a random distribution of self-assembled molecules can be programmed to perform a specific logic function. In this paper we present a novel approach to demonstrate plausibility of the idea of “creating functionality from disorder”. The experimental results vindicate the plausibility of training a nanocell to perform a logic operation. A negative differential resistance (NDR) circuit has been designed to emulate the Λ-type I-V characteristics of the molecular switches connected between any pair of nodes in the actual nanocell. A nanocell model is then constructed taking instances of this NDR circuit. As a primary exploration of the nanocell concept the omnipotent programming was considered. The results from HSPICE simulations are then fed to the genetic algorithm(GA) solver in MATLAB to provide us with the optimized configuration(or a combination of switch states) of the NDR circuits for which the nanocell model yields the functionality of one or multiple target logic devices. Finally mortal programming is also accomplished. The GA solver is used again to provide us with the voltages which ought to be applied on each of the exterior nodes (apart from the input and output nodes) of the nanocell to yield a response resembling a NAND gate.
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