G. Ng, S. Arulkumaran, S. Vicknesh, H. Wang, K. Ang, C. M. Kumar, K. Ranjan, G. Lo, S. Tripathy, C. Boon, W. M. Lim
{"title":"硅基氮化镓集成技术","authors":"G. Ng, S. Arulkumaran, S. Vicknesh, H. Wang, K. Ang, C. M. Kumar, K. Ranjan, G. Lo, S. Tripathy, C. Boon, W. M. Lim","doi":"10.1109/RFIT.2012.6401646","DOIUrl":null,"url":null,"abstract":"This work presents our recent progress on addressing two major challenges to realizing GaN-Silicon integration namely epitaxial growth of GaN-on-Silicon and CMOS-compatible process. We have successfully demonstrated 0.3-μm gate-length GaN HEMTs on 8-inch Si(111) substrate with fT of 28GHz and fmax of of 64GHz. These device performances are comparable to our reported devices fabricated on 4-inch Si substrate. We have also developed a GaN HEMT process with CMOS-compatible non-gold metal scheme. Excellent ohmic contacts (Rc=0.24 Ω-mm) with smooth surface morphology have been achieved which are comparable to those using conventional III-V gold-based ohmic contacts. 0.15-μm gate-length GaN HEMTs fabricated with this process achieved fT and fmax of 51 GHz and 50GHz respectively. The 5nm-thick AlGaN barrier HEMT exhibited three terminal OFF-state breakdown voltage (BVgd) of 83 V. Our results demonstrate the feasibility of realizing CMOS-compatible high performance GaN HEMTs on 8-inch silicon substrates for future GaN-on-Si integration.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"GaN-on-Silicon integration technology\",\"authors\":\"G. Ng, S. Arulkumaran, S. Vicknesh, H. Wang, K. Ang, C. M. Kumar, K. Ranjan, G. Lo, S. Tripathy, C. Boon, W. M. Lim\",\"doi\":\"10.1109/RFIT.2012.6401646\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents our recent progress on addressing two major challenges to realizing GaN-Silicon integration namely epitaxial growth of GaN-on-Silicon and CMOS-compatible process. We have successfully demonstrated 0.3-μm gate-length GaN HEMTs on 8-inch Si(111) substrate with fT of 28GHz and fmax of of 64GHz. These device performances are comparable to our reported devices fabricated on 4-inch Si substrate. We have also developed a GaN HEMT process with CMOS-compatible non-gold metal scheme. Excellent ohmic contacts (Rc=0.24 Ω-mm) with smooth surface morphology have been achieved which are comparable to those using conventional III-V gold-based ohmic contacts. 0.15-μm gate-length GaN HEMTs fabricated with this process achieved fT and fmax of 51 GHz and 50GHz respectively. The 5nm-thick AlGaN barrier HEMT exhibited three terminal OFF-state breakdown voltage (BVgd) of 83 V. Our results demonstrate the feasibility of realizing CMOS-compatible high performance GaN HEMTs on 8-inch silicon substrates for future GaN-on-Si integration.\",\"PeriodicalId\":187550,\"journal\":{\"name\":\"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIT.2012.6401646\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIT.2012.6401646","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This work presents our recent progress on addressing two major challenges to realizing GaN-Silicon integration namely epitaxial growth of GaN-on-Silicon and CMOS-compatible process. We have successfully demonstrated 0.3-μm gate-length GaN HEMTs on 8-inch Si(111) substrate with fT of 28GHz and fmax of of 64GHz. These device performances are comparable to our reported devices fabricated on 4-inch Si substrate. We have also developed a GaN HEMT process with CMOS-compatible non-gold metal scheme. Excellent ohmic contacts (Rc=0.24 Ω-mm) with smooth surface morphology have been achieved which are comparable to those using conventional III-V gold-based ohmic contacts. 0.15-μm gate-length GaN HEMTs fabricated with this process achieved fT and fmax of 51 GHz and 50GHz respectively. The 5nm-thick AlGaN barrier HEMT exhibited three terminal OFF-state breakdown voltage (BVgd) of 83 V. Our results demonstrate the feasibility of realizing CMOS-compatible high performance GaN HEMTs on 8-inch silicon substrates for future GaN-on-Si integration.