Analysis of The DC-Link Capacitance Requirement in High Level MCVSI

In horizontal axis wind turbines, the generator and converter are always designed to be placed in the nacelle on the top, and step-up transformers are located at the bottom of the tower or in a substation on the ground. Power is transmitted from nacelle to the transformer in low voltage and high current via parallel cables. In such an arrangement, high I2R loss would be expected. In addition to that, high current cable is always expensive and difficult to be installed in a turbine due to its bulkiness. To increase the efficiency and reduce the cost, an alternative high voltage configuration is suggested with the use of multilevel inverter topologies which is located in the nacelle. Featuring simplicity, reliability and flexibility, the multilevel cascaded voltage source inverter (MCVSI) topology is being considered to be the most attractive option. MCVSI combines the output voltages of cascaded inverter modules and forms a synthesized multilevel output. It is generally assumed that smoother output voltage can be obtained by increasing the number of cascade inverters. However, this study shows that, when the number of cascading goes above certain threshold, the 2nd order harmonic distortion at the DC-link will start to dominate the harmonic distortion on the AC side and raises the distortion level. This paper provides detailed analyses and discussions on this issue, to show that there is a trade off point in increasing the cascading level. The DC-link capacitance is determined