{"title":"Ge注入sige沟道p- mosfet的仿真","authors":"G. Niu, G. Ruan","doi":"10.1109/TENCON.1995.496427","DOIUrl":null,"url":null,"abstract":"This paper describes the process feasibility analysis and numerical simulation of Ge implanted SiGe-channel p-MOSFETs. The average separation between conducting holes and SiO/sub 2/-Si interface peaks at certain effective implantation range, implies an optimum mask thickness. Threshold voltage is shown to increase with increasing Ge dose and decreasing effective projected range.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Simulation of Ge implanted SiGe-channel p-MOSFETs\",\"authors\":\"G. Niu, G. Ruan\",\"doi\":\"10.1109/TENCON.1995.496427\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the process feasibility analysis and numerical simulation of Ge implanted SiGe-channel p-MOSFETs. The average separation between conducting holes and SiO/sub 2/-Si interface peaks at certain effective implantation range, implies an optimum mask thickness. Threshold voltage is shown to increase with increasing Ge dose and decreasing effective projected range.\",\"PeriodicalId\":425138,\"journal\":{\"name\":\"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings\",\"volume\":\"50 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-11-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TENCON.1995.496427\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TENCON.1995.496427","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper describes the process feasibility analysis and numerical simulation of Ge implanted SiGe-channel p-MOSFETs. The average separation between conducting holes and SiO/sub 2/-Si interface peaks at certain effective implantation range, implies an optimum mask thickness. Threshold voltage is shown to increase with increasing Ge dose and decreasing effective projected range.
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