{"title":"提出了采用多值信号处理的CMOS VLSI实现电子神经元","authors":"B. Taheri","doi":"10.1109/ISMVL.1991.130730","DOIUrl":null,"url":null,"abstract":"Several approaches to the hardware implementation of an electronic neuron are presented and compared. A hardware implementation of a neuron that uses a voltage-controlled input weights is introduced, and its simulated performance presented. This electronic neuron circuit is ideal for CMOS VLSI implementations of neural networks, because it merges, the advantages of analog and digital techniques. In addition, this pseudoanalog technique utilizes low power, high speed, and small area requirements for variety of applications.<<ETX>>","PeriodicalId":127974,"journal":{"name":"[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Proposed CMOS VLSI implementation of an electronic neuron using multivalued signal processing\",\"authors\":\"B. Taheri\",\"doi\":\"10.1109/ISMVL.1991.130730\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Several approaches to the hardware implementation of an electronic neuron are presented and compared. A hardware implementation of a neuron that uses a voltage-controlled input weights is introduced, and its simulated performance presented. This electronic neuron circuit is ideal for CMOS VLSI implementations of neural networks, because it merges, the advantages of analog and digital techniques. In addition, this pseudoanalog technique utilizes low power, high speed, and small area requirements for variety of applications.<<ETX>>\",\"PeriodicalId\":127974,\"journal\":{\"name\":\"[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-05-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.1991.130730\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1991.130730","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Proposed CMOS VLSI implementation of an electronic neuron using multivalued signal processing
Several approaches to the hardware implementation of an electronic neuron are presented and compared. A hardware implementation of a neuron that uses a voltage-controlled input weights is introduced, and its simulated performance presented. This electronic neuron circuit is ideal for CMOS VLSI implementations of neural networks, because it merges, the advantages of analog and digital techniques. In addition, this pseudoanalog technique utilizes low power, high speed, and small area requirements for variety of applications.<>