用于14nm FDSOI CMOS技术性能和工艺可变性评估的新型紧凑模型

Proceedings of the 2015 International Conference on Microelectronic Test Structures Pub Date : 2015-03-23 DOI:10.1109/ICMTS.2015.7106109

Y. Denis, F. Monsieur, G. Ghibaudo, J. Mazurier, E. Josse, D. Rideau, C. Charbuillet, C. Tavernier, H. Jaouen

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引用次数: 1

摘要

本文为14nm FDSOI CMOS技术的性能和工艺可变性评估提供了一个紧凑的模型。研究了MOS的性能与工艺参数的关系。然后利用方差的反向传播(BPV)对晶圆内的生产设备进行了建模。该应用程序允许发现主要模型参数贡献的总MOS晶体管电阻(Ron)可变性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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New compact model for performance and process variability assessment in 14nm FDSOI CMOS technology

This paper provides a compact model for performance and process variability assessment in 14nm FDSOI CMOS technology. It is used to investigate MOS performance relation with process parameters. Then production device within wafer variability has been modeled using backward propagation of variance (BPV). This application allows spotting the main model parameter contributing to the total MOS transistor resistance (Ron) variability.

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Proceedings of the 2015 International Conference on Microelectronic Test Structures

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