{"title":"基于FPGA的鉴相器设计与实现","authors":"Praveen Kumar, Vishal Kumar, R. Pratap","doi":"10.1109/CERA.2017.8343310","DOIUrl":null,"url":null,"abstract":"This paper presents the design and implementation of a phase detector on a high speed field programmable gate array. The phase has been determined using zero-crossing detection approach. All the components used in the proposed design have been realized on the digital platform. Verilog and Xilinx ISE 12.4 design tool have been used for the development and verification of the design. The design is implemented on Virtex ML505 development board. The complete design has three principal modules namely; controller for analog-to-digital converter, zero crossing detection, and phase measurement. Real-time verification of the proposed design has been carried out with the help of Real time digital simulator and results are recorded on digital oscilloscope.","PeriodicalId":286358,"journal":{"name":"2017 6th International Conference on Computer Applications In Electrical Engineering-Recent Advances (CERA)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Design and implementation of phase detector on FPGA\",\"authors\":\"Praveen Kumar, Vishal Kumar, R. Pratap\",\"doi\":\"10.1109/CERA.2017.8343310\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design and implementation of a phase detector on a high speed field programmable gate array. The phase has been determined using zero-crossing detection approach. All the components used in the proposed design have been realized on the digital platform. Verilog and Xilinx ISE 12.4 design tool have been used for the development and verification of the design. The design is implemented on Virtex ML505 development board. The complete design has three principal modules namely; controller for analog-to-digital converter, zero crossing detection, and phase measurement. Real-time verification of the proposed design has been carried out with the help of Real time digital simulator and results are recorded on digital oscilloscope.\",\"PeriodicalId\":286358,\"journal\":{\"name\":\"2017 6th International Conference on Computer Applications In Electrical Engineering-Recent Advances (CERA)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 6th International Conference on Computer Applications In Electrical Engineering-Recent Advances (CERA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CERA.2017.8343310\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 6th International Conference on Computer Applications In Electrical Engineering-Recent Advances (CERA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CERA.2017.8343310","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
摘要
本文介绍了一种基于高速现场可编程门阵列的鉴相器的设计与实现。相位已确定使用过零检测方法。设计中用到的所有组件都在数字平台上实现了。Verilog和Xilinx ISE 12.4设计工具已用于设计的开发和验证。本设计在Virtex ML505开发板上实现。整个设计包括三个主要模块:;用于模数转换器、过零检测和相位测量的控制器。利用实时数字模拟器对所提出的设计进行了实时验证,并将结果记录在数字示波器上。
Design and implementation of phase detector on FPGA
This paper presents the design and implementation of a phase detector on a high speed field programmable gate array. The phase has been determined using zero-crossing detection approach. All the components used in the proposed design have been realized on the digital platform. Verilog and Xilinx ISE 12.4 design tool have been used for the development and verification of the design. The design is implemented on Virtex ML505 development board. The complete design has three principal modules namely; controller for analog-to-digital converter, zero crossing detection, and phase measurement. Real-time verification of the proposed design has been carried out with the help of Real time digital simulator and results are recorded on digital oscilloscope.