具有低导通电阻和高跨导的折叠栅极LDMOS

12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094) Pub Date : 2000-05-22 DOI:10.1109/ISPSD.2000.856772

Shuming Xu, Yuanzheng Zhu, P. Foo, Y.C. Liang, J. Sin

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引用次数: 3

摘要

本文提出了一种低导通电阻、高跨导的新型LDMOSFET。通过使用额外的掩膜在硅衬底表面开沟，形成折叠栅极结构。实验中通道密度增加了一倍。使用折叠门LDMOS (FG-gate LDMOS)概念，导通电阻降低了40%，而跨导提高了80%。折叠门概念的意义将可用于CMOS和其他mos门控器件。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Folded gate LDMOS with low on-resistance and high transconductance

In this paper, a novel LDMOSFET is proposed with low on-resistance and high transconductance. The silicon substrate surface is trenched by using an extra mask, resulting in a folded gate structure. The channel density is doubled in the experiment. With the Folded Gate LDMOS (FG-gate LDMOS) concept, the on-resistance was reduced by 40%, while the transconductance was improved by 80%. The significance of the folded gate concept will be available for CMOS and other MOS-gated devices.

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12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)

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