CASTOR:有限状态机综合系统的状态分配

G. Rietsche, M. Neher
{"title":"CASTOR:有限状态机综合系统的状态分配","authors":"G. Rietsche, M. Neher","doi":"10.1109/EASIC.1990.207903","DOIUrl":null,"url":null,"abstract":"The authors describe some of the state assignment heuristics, which are applied in the finite state machine synthesis system CASTOR. They concentrate on algorithms for two-level logic implementations, while work on algorithms for multi-level logic implementations is in progress. Input to the system is a description of the FSM in form of a state table. CASTOR generates an appropriate controller consisting of pre- and postprocessing structures around a kernel FSM, which may be a PLA, a ROM or random logic. In the case of a PLA or random logical controller coding constraints are extracted for the kernel FSM. Then these coding constraints have to be satisfied by adequate state assignment algorithms in order to minimize the area of the physical implementation.<<ETX>>","PeriodicalId":205695,"journal":{"name":"[Proceedings] EURO ASIC `90","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"CASTOR: state assignment in a finite state machine synthesis system\",\"authors\":\"G. Rietsche, M. Neher\",\"doi\":\"10.1109/EASIC.1990.207903\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors describe some of the state assignment heuristics, which are applied in the finite state machine synthesis system CASTOR. They concentrate on algorithms for two-level logic implementations, while work on algorithms for multi-level logic implementations is in progress. Input to the system is a description of the FSM in form of a state table. CASTOR generates an appropriate controller consisting of pre- and postprocessing structures around a kernel FSM, which may be a PLA, a ROM or random logic. In the case of a PLA or random logical controller coding constraints are extracted for the kernel FSM. Then these coding constraints have to be satisfied by adequate state assignment algorithms in order to minimize the area of the physical implementation.<<ETX>>\",\"PeriodicalId\":205695,\"journal\":{\"name\":\"[Proceedings] EURO ASIC `90\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-05-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[Proceedings] EURO ASIC `90\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EASIC.1990.207903\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings] EURO ASIC `90","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EASIC.1990.207903","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15

摘要

介绍了在有限状态机综合系统CASTOR中应用的几种状态分配启发式方法。他们主要研究两级逻辑实现的算法,而多级逻辑实现的算法研究正在进行中。系统的输入是以状态表的形式对FSM进行描述。CASTOR生成一个适当的控制器,该控制器由围绕内核FSM的预处理和后处理结构组成,内核FSM可以是PLA、ROM或随机逻辑。在PLA或随机逻辑控制器的情况下,为内核FSM提取编码约束。然后,这些编码约束必须通过适当的状态分配算法来满足,以最小化物理实现的面积。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
CASTOR: state assignment in a finite state machine synthesis system
The authors describe some of the state assignment heuristics, which are applied in the finite state machine synthesis system CASTOR. They concentrate on algorithms for two-level logic implementations, while work on algorithms for multi-level logic implementations is in progress. Input to the system is a description of the FSM in form of a state table. CASTOR generates an appropriate controller consisting of pre- and postprocessing structures around a kernel FSM, which may be a PLA, a ROM or random logic. In the case of a PLA or random logical controller coding constraints are extracted for the kernel FSM. Then these coding constraints have to be satisfied by adequate state assignment algorithms in order to minimize the area of the physical implementation.<>
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Built-in self-test for generated blocks in an ASIC environment Automatic synthesis of mu programmed controllers Latch-up characterization of semicustom using ATE KIM 20: a symbolic RISC microprocessor for embedded advanced control Layout automation of CMOS analog building blocks with CADENCE
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1