数字控制的10mhz单片降压转换器

2006 IEEE Workshops on Computers in Power Electronics Pub Date : 2006-07-16 DOI:10.1109/COMPEL.2006.305668

T. Takayama, D. Maksimović

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引用次数: 27

摘要

本文介绍了一种采用标准0.35um CMOS工艺实现的10mhz数字控制降压变换器的设计与实现。基于离散时间功率级模型，我们证明了与标准二阶PID补偿器相比，三阶补偿器可以设计出更好的瞬态响应和抗干扰性。高效的硬件实现包括一个查找表型补偿器、一个10位混合DPWM(2位计数器、5位延迟线和3位抖动)和一个优化了效率的功率级

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Digitally controlled 10 MHz monolithic buck converter

This paper describes design and implementation of a 10 MHz digitally controlled buck converter realized in a standard 0.35um CMOS process. Based on a discrete-time power-stage model, we show that a 3rd-order compensator can be designed for improved transient responses and disturbance rejection compared to standard 2nd-order PID compensators. Efficient hardware realization includes a look-up table type compensator, a 10-bit hybrid DPWM (2-bit counter, 5-bit delay-line, and 3-bit dither) and a power stage optimized for efficiency

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2006 IEEE Workshops on Computers in Power Electronics

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