{"title":"一种采用n路滤波的6ghz 130nm CMOS谐波复合射频接收机前端","authors":"Nakisa Shams, A. Abbasi, F. Nabki","doi":"10.1109/NEWCAS49341.2020.9159795","DOIUrl":null,"url":null,"abstract":"An RF receiver front-end using two feedforward N-path switching filters and harmonic-recombination configuration is presented. As the time-variant nature of the N-path filter introduces multiple frequency translations, third harmonic selection of the switching frequency rather than the fundamental helps to reduce the input frequency of the multiphase clock generator by a factor of three. The proposed 5.9-7.1 GHz RF receiver operates at the third harmonic of the local oscillator, thanks to the combination of an N-Path switching filter and a harmonic recombination architecture. The receiver is implemented in a 130 nm CMOS technology and operates from a 1.2 V supply. Post-layout simulation results show that, for a 6 GHz RF input, the receiver provides a harmonic rejection of 45 and 55 dB for the first and second harmonics, respectively. A noise figure of 5.5 dB at a 16 MHz baseband frequency is achieved, and an input matching of less than -15 dB is attained over the desired frequency band.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A 6 GHz 130 nm CMOS Harmonic Recombination RF Receiver Front-End Using N-Path Filtering\",\"authors\":\"Nakisa Shams, A. Abbasi, F. Nabki\",\"doi\":\"10.1109/NEWCAS49341.2020.9159795\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An RF receiver front-end using two feedforward N-path switching filters and harmonic-recombination configuration is presented. As the time-variant nature of the N-path filter introduces multiple frequency translations, third harmonic selection of the switching frequency rather than the fundamental helps to reduce the input frequency of the multiphase clock generator by a factor of three. The proposed 5.9-7.1 GHz RF receiver operates at the third harmonic of the local oscillator, thanks to the combination of an N-Path switching filter and a harmonic recombination architecture. The receiver is implemented in a 130 nm CMOS technology and operates from a 1.2 V supply. Post-layout simulation results show that, for a 6 GHz RF input, the receiver provides a harmonic rejection of 45 and 55 dB for the first and second harmonics, respectively. A noise figure of 5.5 dB at a 16 MHz baseband frequency is achieved, and an input matching of less than -15 dB is attained over the desired frequency band.\",\"PeriodicalId\":135163,\"journal\":{\"name\":\"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NEWCAS49341.2020.9159795\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS49341.2020.9159795","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 6 GHz 130 nm CMOS Harmonic Recombination RF Receiver Front-End Using N-Path Filtering
An RF receiver front-end using two feedforward N-path switching filters and harmonic-recombination configuration is presented. As the time-variant nature of the N-path filter introduces multiple frequency translations, third harmonic selection of the switching frequency rather than the fundamental helps to reduce the input frequency of the multiphase clock generator by a factor of three. The proposed 5.9-7.1 GHz RF receiver operates at the third harmonic of the local oscillator, thanks to the combination of an N-Path switching filter and a harmonic recombination architecture. The receiver is implemented in a 130 nm CMOS technology and operates from a 1.2 V supply. Post-layout simulation results show that, for a 6 GHz RF input, the receiver provides a harmonic rejection of 45 and 55 dB for the first and second harmonics, respectively. A noise figure of 5.5 dB at a 16 MHz baseband frequency is achieved, and an input matching of less than -15 dB is attained over the desired frequency band.