一个性能敏感的I/O接口，用于3D堆叠存储器系统

2017 IEEE 8th Annual Ubiquitous Computing, Electronics and Mobile Communication Conference (UEMCON) Pub Date : 2017-10-01 DOI:10.1109/UEMCON.2017.8249078

Nahid Mirzaie, Ahmed Alzahmi, Chung-Ching Lin, Gyung-Su Byun

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引用次数: 4

摘要

提出了一种低功耗、高性能的三维基带点对点存储接口。为了提高信号完整性和功率效率，在整个3D架构上采用了优化方法，包括通过硅通孔(TSV)和65纳米CMOS技术的I/O接口通道。利用三维电磁求解工具(HFSS)对三维TSV通道和μbump通道进行建模，生成s参数。优化后的系统性能得到了验证。结果表明，整个结构的能量效率为1.52 pJ/b，数据速率为2.3 Gb/s。

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A performance-aware I/O interface for 3D stacked memory systems

A low-power and high-performance three-dimensional (3D) baseband point-to-point (P2P) memory interface is presented. To improve both signal integrity and power efficiency, an optimization approach is utilized on the entire 3D architecture, including through-silicon via (TSV), and I/O interface channel in a 65 nm CMOS technology. The 3D TSV and μbump channels are modeled to generate S-parameters using a 3D EM solver tool (HFSS). The system performance is demonstrated after the optimization process. The results reveal that the whole structure achieves an energy efficiency of 1.52 pJ/b 2.3 Gb/s data rate.

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2017 IEEE 8th Annual Ubiquitous Computing, Electronics and Mobile Communication Conference (UEMCON)

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