三维集成电路中的隔离

A. Margomenos, S. Valas, M. I. Herman, L. Katehi
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引用次数: 31

摘要

设计高密度集成电路的必要性使得电路隔离问题成为一个非常重要的问题。在多层结构中,由平面不连续面激发的表面波在相邻的互连上产生寄生电流。随着密度的增加和尺寸的减小,这种寄生耦合成为一个限制因素。这些邻近效应对互连几何形状的依赖性是本研究的主题。采用了先前建议的通过在共同衬底中引入微机械腔来增加隔离的方法。研究了有限接地微带线和有限接地共面波导的各种结构。在降低隔离方面,理论和实验结果显示了在高密度电路中同时使用FGCPW和MS的优势。
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Isolation in three-dimensional integrated circuits
The necessity for design of ICs with higher density makes the issue of circuit isolation a very important one. In multilayer structures, surface waves excited by planar discontinuities induce parasitic currents on adjoining interconnects. This parasitic coupling becomes a limiting factor as density increases and size reduces. The dependence of these proximity effects on interconnect geometry is the subject of this study. The previously suggested method of increasing isolation by introducing micromachined cavities in the common substrate is utilized. Various configurations of finite ground microstrip lines (MS) and finite ground coplanar waveguides (FGCPW) have been studied. Theoretical and experimental results, in terms of reduced isolation, are presented showing the advantages of the simultaneous use of FGCPW and MS in high-density circuits.
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