Device and Circuit Level Performance Analysis of a New Nanoscale DGJL MOSFET Design Using an Accurate Numerical Computation

This paper shows a new Double Gate Junctionless (DGJL) MOSFET design based on both highly doped drain/source extensions and gate material engineering. The device electrical behavior at the nanoscale level is investigated using an accurate numerical computation based on TCAD simulation provided by ATLAS 2D simulator, where quantum confinement effects and the modified drift-diffusion transport model that takes into account SCEs are included. Circuit performance parameters are also developed incorporating the impact of dual-material gate engineering and highly doped extension regions. The effect of the proposed design amendments on the performance of the common source single stage amplifier circuit based on DGJL MOSFET is also performed, where the proposed design exhibits an outstanding capability for offering improved amplifier properties. In order to analyze the characteristics and circuit performance of the device, we have adopted mixed mode simulation under Silvaco environment for the implementation of the inverter circuit. Based on the numerical, outcomes satisfactory results are recorded in comparison with the conventional nanoscale junctionless design.