J. Onuki, Y. Chonan, T. Komiyama, M. Nihei, R. Saitou, M. Suwa, M. Kitano
{"title":"一种大面积、大功率IGBT模块无空洞焊接新工艺","authors":"J. Onuki, Y. Chonan, T. Komiyama, M. Nihei, R. Saitou, M. Suwa, M. Kitano","doi":"10.1109/ISPSD.2000.856845","DOIUrl":null,"url":null,"abstract":"A new void free process for the solder joint between a chip mounted AlN substrate and a metal substrate in large-area, high power IGBT modules has been investigated. The following new process consists of two steps. First, Ar/sup +/ ions were used to clean the surface of Ni plated films on the metal and AlN substrates by followed by coating with a thin Ag film, and secondly, 50 wt.% Pb-Sn solder sandwiched between the two substrates was heated in vacuum at 503 K for 5 min. and then cooled in a N/sub 2/ atmosphere. Using this process, the area percentage of voids in a soldering area up to 130/spl times/190 mm/sup 2/ can be reduced to less than 0.2%. The fatigue life time of solder joints made with this new method are found to be about 3 times longer than those by the soldering methods in H/sub 2/ (abbreviated as H/sub 2/ process hereafter).","PeriodicalId":260241,"journal":{"name":"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A new void free soldering process in large-area, high power IGBT modules\",\"authors\":\"J. Onuki, Y. Chonan, T. Komiyama, M. Nihei, R. Saitou, M. Suwa, M. Kitano\",\"doi\":\"10.1109/ISPSD.2000.856845\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new void free process for the solder joint between a chip mounted AlN substrate and a metal substrate in large-area, high power IGBT modules has been investigated. The following new process consists of two steps. First, Ar/sup +/ ions were used to clean the surface of Ni plated films on the metal and AlN substrates by followed by coating with a thin Ag film, and secondly, 50 wt.% Pb-Sn solder sandwiched between the two substrates was heated in vacuum at 503 K for 5 min. and then cooled in a N/sub 2/ atmosphere. Using this process, the area percentage of voids in a soldering area up to 130/spl times/190 mm/sup 2/ can be reduced to less than 0.2%. The fatigue life time of solder joints made with this new method are found to be about 3 times longer than those by the soldering methods in H/sub 2/ (abbreviated as H/sub 2/ process hereafter).\",\"PeriodicalId\":260241,\"journal\":{\"name\":\"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)\",\"volume\":\"67 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.2000.856845\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2000.856845","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new void free soldering process in large-area, high power IGBT modules
A new void free process for the solder joint between a chip mounted AlN substrate and a metal substrate in large-area, high power IGBT modules has been investigated. The following new process consists of two steps. First, Ar/sup +/ ions were used to clean the surface of Ni plated films on the metal and AlN substrates by followed by coating with a thin Ag film, and secondly, 50 wt.% Pb-Sn solder sandwiched between the two substrates was heated in vacuum at 503 K for 5 min. and then cooled in a N/sub 2/ atmosphere. Using this process, the area percentage of voids in a soldering area up to 130/spl times/190 mm/sup 2/ can be reduced to less than 0.2%. The fatigue life time of solder joints made with this new method are found to be about 3 times longer than those by the soldering methods in H/sub 2/ (abbreviated as H/sub 2/ process hereafter).
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