用于嵌入式应用的VLIW多集群处理器的SIMD扩展

Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors Pub Date : 2002-09-16 DOI:10.1109/ICCD.2002.1106823

D. Barretta, W. Fornaciari, M. Sami, D. Pau

{"title":"用于嵌入式应用的VLIW多集群处理器的SIMD扩展","authors":"D. Barretta, W. Fornaciari, M. Sami, D. Pau","doi":"10.1109/ICCD.2002.1106823","DOIUrl":null,"url":null,"abstract":"We propose a retargetable architecture, based on a multicluster VLIW processor that can exploit either instruction level parallelism (ILP) or ILP and data level parallelism (DLP) jointly in a SIMD fashion. Simulation results show that performances may increase significantly when the application is compiled for the proposed architecture.","PeriodicalId":164768,"journal":{"name":"Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"SIMD extension to VLIW multicluster processors for embedded applications\",\"authors\":\"D. Barretta, W. Fornaciari, M. Sami, D. Pau\",\"doi\":\"10.1109/ICCD.2002.1106823\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose a retargetable architecture, based on a multicluster VLIW processor that can exploit either instruction level parallelism (ILP) or ILP and data level parallelism (DLP) jointly in a SIMD fashion. Simulation results show that performances may increase significantly when the application is compiled for the proposed architecture.\",\"PeriodicalId\":164768,\"journal\":{\"name\":\"Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors\",\"volume\":\"60 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-09-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCD.2002.1106823\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.2002.1106823","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 6

摘要

我们提出了一种基于多集群VLIW处理器的可重目标架构，该架构可以以SIMD方式共同利用指令级并行性(ILP)或ILP和数据级并行性(DLP)。仿真结果表明，在该架构下编译应用程序可以显著提高性能。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

SIMD extension to VLIW multicluster processors for embedded applications

We propose a retargetable architecture, based on a multicluster VLIW processor that can exploit either instruction level parallelism (ILP) or ILP and data level parallelism (DLP) jointly in a SIMD fashion. Simulation results show that performances may increase significantly when the application is compiled for the proposed architecture.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊