{"title":"用于多标准高比特率HDTV视频比特流处理和熵解码的存储器高效可编程处理器","authors":"Norman Nolte, S. Moch, Markus Kock, P. Pirsch","doi":"10.1109/SOCCON.2009.5398001","DOIUrl":null,"url":null,"abstract":"Decoding of high bitrate video bitstreams is an application field traditionally claimed by dedicated hardware architectures, since embedded general purpose processors are not able to satisfy the high performance requirements of entropy decoding. We present a fully programmable multi-standard bitstream processor. The proposed bit granular memory and data path architecture provides efficient processing and storage capabilities for data words of arbitrary length. Running at a 300 MHz clock frequency, the processor is able to decode, e.g., MPEG-2 and VC-1 1080p HDTV bitstreams with a maximum bitrate of 100 Mbit/s.","PeriodicalId":303505,"journal":{"name":"2009 IEEE International SOC Conference (SOCC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Memory efficient programmable processor for bitstream processing and entropy decoding of multiple-standard high-bitrate HDTV video bitstreams\",\"authors\":\"Norman Nolte, S. Moch, Markus Kock, P. Pirsch\",\"doi\":\"10.1109/SOCCON.2009.5398001\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Decoding of high bitrate video bitstreams is an application field traditionally claimed by dedicated hardware architectures, since embedded general purpose processors are not able to satisfy the high performance requirements of entropy decoding. We present a fully programmable multi-standard bitstream processor. The proposed bit granular memory and data path architecture provides efficient processing and storage capabilities for data words of arbitrary length. Running at a 300 MHz clock frequency, the processor is able to decode, e.g., MPEG-2 and VC-1 1080p HDTV bitstreams with a maximum bitrate of 100 Mbit/s.\",\"PeriodicalId\":303505,\"journal\":{\"name\":\"2009 IEEE International SOC Conference (SOCC)\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE International SOC Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCCON.2009.5398001\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International SOC Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCCON.2009.5398001","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Memory efficient programmable processor for bitstream processing and entropy decoding of multiple-standard high-bitrate HDTV video bitstreams
Decoding of high bitrate video bitstreams is an application field traditionally claimed by dedicated hardware architectures, since embedded general purpose processors are not able to satisfy the high performance requirements of entropy decoding. We present a fully programmable multi-standard bitstream processor. The proposed bit granular memory and data path architecture provides efficient processing and storage capabilities for data words of arbitrary length. Running at a 300 MHz clock frequency, the processor is able to decode, e.g., MPEG-2 and VC-1 1080p HDTV bitstreams with a maximum bitrate of 100 Mbit/s.