在运行时对纳米处理器架构进行优化

J. Teller, F. Ozguner, R. Ewing
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引用次数: 0

摘要

我们的研究解决了有效执行和控制在嵌入式系统上运行的日益苛刻和多样化的应用程序的需要。我们建议在运行时优化应用程序,在运行时优化和应用程序之间共享执行资源。我们使用TRIPS处理器(由德克萨斯大学奥斯汀分校开发)来演示在纳米处理器架构(NA)上使用推测片执行的运行时优化。初步结果令人鼓舞。尽管目前的实现有限制,但我们展示了7%/25%的加速提升(整个应用程序/单个任务),未来的实现可能会有更大的加速提升。
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Optimization at runtime on a nanoprocessor architecture
Our research addresses the need to efficiently execute and control the increasingly demanding and diverse nature of applications running on embedded systems. We propose optimizing an application at runtime, sharing execution resources between the runtime optimizations and the application. We use the TRIPS processor (developed by the University of Texas at Austin) to demonstrate runtime optimization using speculative slice execution on a nanoprocessor architecture (NA). Preliminary results are promising. Despite the current implementations limitations, we show speedups of 7%/25% (whole application/single task), with larger speedups are possible for future implementations.
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