{"title":"一个108Gb/s 4:1多路复用器，采用0.13/spl mu/m sige双极技术","authors":"M. Meghelli","doi":"10.1109/ISSCC.2004.1332681","DOIUrl":null,"url":null,"abstract":"A 4:1 multiplexer implemented in a 210GHz f/sub t/, 0.13/spl mu/m SiGe-bipolar technology and operating beyond 100Gb/s is reported. Control of on-chip clock distribution is critical to achieve such data rate. The chip consumes 1.45W from a -3.3V supply and exhibits less than 340fs rms jitter on the output data.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"42","resultStr":"{\"title\":\"A 108Gb/s 4:1 multiplexer in 0.13/spl mu/m SiGe-bipolar technology\",\"authors\":\"M. Meghelli\",\"doi\":\"10.1109/ISSCC.2004.1332681\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 4:1 multiplexer implemented in a 210GHz f/sub t/, 0.13/spl mu/m SiGe-bipolar technology and operating beyond 100Gb/s is reported. Control of on-chip clock distribution is critical to achieve such data rate. The chip consumes 1.45W from a -3.3V supply and exhibits less than 340fs rms jitter on the output data.\",\"PeriodicalId\":273317,\"journal\":{\"name\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"volume\":\"65 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"42\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2004.1332681\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2004.1332681","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 108Gb/s 4:1 multiplexer in 0.13/spl mu/m SiGe-bipolar technology
A 4:1 multiplexer implemented in a 210GHz f/sub t/, 0.13/spl mu/m SiGe-bipolar technology and operating beyond 100Gb/s is reported. Control of on-chip clock distribution is critical to achieve such data rate. The chip consumes 1.45W from a -3.3V supply and exhibits less than 340fs rms jitter on the output data.
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