利用可调谐线性化浮栅CMOS电阻设计二值加权电阻DAC

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI:10.1109/CICC.2006.320867

Erhan Ozalevli, H. Dinç, H. Lo, P. Hasler

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引用次数: 10

摘要

我们提出了一个用于量化器的4位二进制加权电阻DAC的实现。该电路采用可调浮栅CMOS电阻器，利用浮栅晶体管的电容耦合和电压存储能力，采用标度栅线性化技术抑制MOSFET的非线性。在25℃下，这些电阻的电阻在10年内漂移1.6中点10-3%。通过使用这些电阻，在0.5 μ m CMOS工艺中实现了15位精确的DAC

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Design of a binary-weighted resistor DAC using tunable linearized floating-gate CMOS resistors

We present an implementation of a 4-bit binary-weighted-resistor DAC to be used in quantizers. It is built by using tunable floating-gate CMOS resistors, which exploit the capacitive coupling and voltage storage capabilities of floating-gate transistors and employ scaled-gate linearization technique to suppress the MOSFET nonlinearities. The resistance of these resistors drifts 1.6 middot 10-3% over the period of 10 years at 25degC. By using these resistors, 15-bit accurate DAC is implemented in 0.5mum CMOS process

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IEEE Custom Integrated Circuits Conference 2006

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