Cordic-based Softmax Acceleration Method of Convolution Neural Network on FPGA

With the vigorous development of computing power, Convolutional Neural Network (CNN) is developing rapidly, and new CNN structures with more layers and better performance continue to appear. Field Programmable Gate Array(FPGA) has gradually become the best choice for people to deploy and accelerate CNNs as a current research hotspot. This paper has studied the hardware acceleration method of FPGA to implement and simulate the Softmax layer of Alexnet on Vivado 2018.1. Combined with the features of FPGA, the Cordic algorithm is used to implement basic operations such as division and exponential functions, instead of consuming floating-point arithmetic resources. The paper proposes a method to shrink the convergence domain and analyzes the errors generated by the different digits of data after quantization and fixed-point inputs. The relative error of the Softmax layer exponential function is controlled below 0.0146% by reducing the bit width which satisfied the design requirements and saved resources. This method can complete the calculation and classification of the Softmax layer in 66.5 cycles without processing the layer data at fixed points, which greatly improves the calculation speed of the Softmax layer.