CPU负载和空闲状态对嵌入式处理器能耗的影响

S. Daud, R. B. Ahmad, Ong Bi Lynn, Zahereel Ishwar Abd Kareem, Latifah Munirah Kamarudin, P. Ehkan, M. N. M. Warip, R. R. Othman
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引用次数: 7

摘要

设备功耗是一个重要的设计考虑因素,特别是对于嵌入式系统。通过降低特定系统的功耗,我们可以有效地延长系统的运行时间,从而允许特定系统的运行时间更长。先前的研究表明,现代嵌入式处理器的功率特性已经随着制造商更好地实现以能量为中心的设计而得到改善。硬件优化的实现,如更好的时钟和功率门控,已被证明可以在负载和卸载处理期间产生更好的能源使用。本文对现代嵌入式处理器的能耗进行了基准测试,研究了空闲时间对处理器和系统能耗的影响。我们发现,处理器在执行过程中处于空闲状态时,处理器的能耗显著降低。处理时间片期间的空闲时间允许处理器使用更少的能量,而无需显式地依赖于频率缩放算法来减少能量消耗。这种直接在处理器硬件内部实现的节能特性有可能使基于软件的频率缩放算法和DVFS方法在降低能源使用方面效果较差。
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The effects of CPU load & idle state on embedded processor energy usage
Device power consumption is a serious design consideration especially for embedded systems. By reducing the power consumption of a particular system, we could effectively prolong the runtime of the system, allowing for longer operational condition of a particular system. Previous studies have suggested that the power characteristics of a modern embedded processor have since been improved with manufacturer's implementation of better energy-focused designs. Implementation of hardware optimization such as better clock and power gating have been shown to produce better energy usage during on-load and off-load processing. In this paper we benchmarked the energy use of a modern embedded processor and study the effects of idling time to the processor and system energy usage. We have found that the processor energy use is significantly reduced in the instant that the processor goes idle during the execution process. The idling time during a processing timeslice allows the processor to use significantly less energy without explicitly depending on a frequency scaling algorithm to reduce energy consumption. This power saving feature directly implemented inside the processor hardware have the possibility to render software based frequency scaling algorithm and DVFS method to be less effective in reducing energy usage.
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