Zixuan Wang, Haobo Xu, H. Ding, Xiaojuan Xia, Xincun Ji, Shanwen Hu, Yu-feng Guo, Rong Wang, Haihang He
{"title":"带可编程时间放大器的流水线时间-数字转换器","authors":"Zixuan Wang, Haobo Xu, H. Ding, Xiaojuan Xia, Xincun Ji, Shanwen Hu, Yu-feng Guo, Rong Wang, Haihang He","doi":"10.1109/ISCAIE.2018.8405501","DOIUrl":null,"url":null,"abstract":"This paper presents a pipeline time-to-digital converter (TDC) using a programmable time amplifier (TA). The TA adds time intervals that contain quantization errors in different stages of the first conversion step to achieve time amplification. Therefore, the TA has advantages of programmability, good linearity and wide input range. The TDC is designed in a 65nm CMOS technology. A time resolution up to 5ps at 230MHz is achieved. The total power consumption is 3mW under a 1V supply.","PeriodicalId":333327,"journal":{"name":"2018 IEEE Symposium on Computer Applications & Industrial Electronics (ISCAIE)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A pipeline time-to-digital converter with a programmable time amplifier\",\"authors\":\"Zixuan Wang, Haobo Xu, H. Ding, Xiaojuan Xia, Xincun Ji, Shanwen Hu, Yu-feng Guo, Rong Wang, Haihang He\",\"doi\":\"10.1109/ISCAIE.2018.8405501\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a pipeline time-to-digital converter (TDC) using a programmable time amplifier (TA). The TA adds time intervals that contain quantization errors in different stages of the first conversion step to achieve time amplification. Therefore, the TA has advantages of programmability, good linearity and wide input range. The TDC is designed in a 65nm CMOS technology. A time resolution up to 5ps at 230MHz is achieved. The total power consumption is 3mW under a 1V supply.\",\"PeriodicalId\":333327,\"journal\":{\"name\":\"2018 IEEE Symposium on Computer Applications & Industrial Electronics (ISCAIE)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE Symposium on Computer Applications & Industrial Electronics (ISCAIE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAIE.2018.8405501\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Symposium on Computer Applications & Industrial Electronics (ISCAIE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAIE.2018.8405501","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A pipeline time-to-digital converter with a programmable time amplifier
This paper presents a pipeline time-to-digital converter (TDC) using a programmable time amplifier (TA). The TA adds time intervals that contain quantization errors in different stages of the first conversion step to achieve time amplification. Therefore, the TA has advantages of programmability, good linearity and wide input range. The TDC is designed in a 65nm CMOS technology. A time resolution up to 5ps at 230MHz is achieved. The total power consumption is 3mW under a 1V supply.