{"title":"采用高速低功率4:2压缩单元设计","authors":"Peng Chang, M. Ahmadi","doi":"10.1109/ISSCS.2009.5206178","DOIUrl":null,"url":null,"abstract":"This paper presents a high speed low power 4:2 compressor cell design based on Domino Logic circuits. Two circuit level optimizations of 4:2 compressors are proposed by using Split Domino Logic and Multiple-output Domino Logic. All three designed circuits are simulated using HSPICE and compared with each other in terms of delay, power consumption, power-delay product, and operation frequency. Simulation results confirm the property of the design.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"94 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A high speed low power 4:2 compressor cell design\",\"authors\":\"Peng Chang, M. Ahmadi\",\"doi\":\"10.1109/ISSCS.2009.5206178\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a high speed low power 4:2 compressor cell design based on Domino Logic circuits. Two circuit level optimizations of 4:2 compressors are proposed by using Split Domino Logic and Multiple-output Domino Logic. All three designed circuits are simulated using HSPICE and compared with each other in terms of delay, power consumption, power-delay product, and operation frequency. Simulation results confirm the property of the design.\",\"PeriodicalId\":277587,\"journal\":{\"name\":\"2009 International Symposium on Signals, Circuits and Systems\",\"volume\":\"94 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-07-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Symposium on Signals, Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCS.2009.5206178\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on Signals, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCS.2009.5206178","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper presents a high speed low power 4:2 compressor cell design based on Domino Logic circuits. Two circuit level optimizations of 4:2 compressors are proposed by using Split Domino Logic and Multiple-output Domino Logic. All three designed circuits are simulated using HSPICE and compared with each other in terms of delay, power consumption, power-delay product, and operation frequency. Simulation results confirm the property of the design.
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