{"title":"可重构开关电容器ΔΣ调制器拓扑设计","authors":"Ying Wei, Pengbo Sun, A. Doboli","doi":"10.1109/SOCC.2006.283865","DOIUrl":null,"url":null,"abstract":"In this paper, a methodology for designing reconfigurable discrete-time DeltaSigma modulator topologies is proposed. Topologies are generated from a set of all possible topologies expressed by a generic topology, and optimized for minimizing the complexity of the topologies, maximizing the topology robustness with respect to circuit nonidealities, and minimizing total power consumption. The paper presents a case study for designing topologies for a three-mode reconfigurable DeltaSigma modulator. The paper also offers a reconfigurable topology implementation on a programmable system-on-chip (PSoC) device.","PeriodicalId":345714,"journal":{"name":"2006 IEEE International SOC Conference","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Reconfigurable Switched-Capacitor ΔΣ Modulator Topology Design\",\"authors\":\"Ying Wei, Pengbo Sun, A. Doboli\",\"doi\":\"10.1109/SOCC.2006.283865\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a methodology for designing reconfigurable discrete-time DeltaSigma modulator topologies is proposed. Topologies are generated from a set of all possible topologies expressed by a generic topology, and optimized for minimizing the complexity of the topologies, maximizing the topology robustness with respect to circuit nonidealities, and minimizing total power consumption. The paper presents a case study for designing topologies for a three-mode reconfigurable DeltaSigma modulator. The paper also offers a reconfigurable topology implementation on a programmable system-on-chip (PSoC) device.\",\"PeriodicalId\":345714,\"journal\":{\"name\":\"2006 IEEE International SOC Conference\",\"volume\":\"57 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2006.283865\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2006.283865","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this paper, a methodology for designing reconfigurable discrete-time DeltaSigma modulator topologies is proposed. Topologies are generated from a set of all possible topologies expressed by a generic topology, and optimized for minimizing the complexity of the topologies, maximizing the topology robustness with respect to circuit nonidealities, and minimizing total power consumption. The paper presents a case study for designing topologies for a three-mode reconfigurable DeltaSigma modulator. The paper also offers a reconfigurable topology implementation on a programmable system-on-chip (PSoC) device.