Hiroyuki Watanabe, J. Symon, W. Dettloff, K. E. Yount
{"title":"VLSI模糊芯片与推理加速板系统","authors":"Hiroyuki Watanabe, J. Symon, W. Dettloff, K. E. Yount","doi":"10.1109/ISMVL.1991.130716","DOIUrl":null,"url":null,"abstract":"The architecture and operational features of a VLSI fuzzy logic inference processor are described. Also described are the architecture and associated high-level software of two VMEbus-board systems based on the fuzzy chip. The VLSI implementation of a fuzzy logic inference mechanism allows the use of rule-based control and decision making in demanding real-time applications. The CMOS chip consists of 688000 transistors, of which 476000 are used for RAM memory. In addition to operating in a robot, the single chip board is installed on a Sun-3 workstation for further research and software development.<<ETX>>","PeriodicalId":127974,"journal":{"name":"[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"49","resultStr":"{\"title\":\"VLSI fuzzy chip and inference accelerator board systems\",\"authors\":\"Hiroyuki Watanabe, J. Symon, W. Dettloff, K. E. Yount\",\"doi\":\"10.1109/ISMVL.1991.130716\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The architecture and operational features of a VLSI fuzzy logic inference processor are described. Also described are the architecture and associated high-level software of two VMEbus-board systems based on the fuzzy chip. The VLSI implementation of a fuzzy logic inference mechanism allows the use of rule-based control and decision making in demanding real-time applications. The CMOS chip consists of 688000 transistors, of which 476000 are used for RAM memory. In addition to operating in a robot, the single chip board is installed on a Sun-3 workstation for further research and software development.<<ETX>>\",\"PeriodicalId\":127974,\"journal\":{\"name\":\"[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-05-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"49\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.1991.130716\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1991.130716","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
VLSI fuzzy chip and inference accelerator board systems
The architecture and operational features of a VLSI fuzzy logic inference processor are described. Also described are the architecture and associated high-level software of two VMEbus-board systems based on the fuzzy chip. The VLSI implementation of a fuzzy logic inference mechanism allows the use of rule-based control and decision making in demanding real-time applications. The CMOS chip consists of 688000 transistors, of which 476000 are used for RAM memory. In addition to operating in a robot, the single chip board is installed on a Sun-3 workstation for further research and software development.<>
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