C. Ni, X. Fu, N. Yoshida, O. Chan, M. Jin, H. Chen, S. Hung, R. Jakkaraju, S. Kesapragada, C. Lazik, R. Hung, S. Gandikota, C. Chang, A. Brand
{"title":"栅极优先TiAlN - p栅极,用于成本效益高的高k金属栅极实现","authors":"C. Ni, X. Fu, N. Yoshida, O. Chan, M. Jin, H. Chen, S. Hung, R. Jakkaraju, S. Kesapragada, C. Lazik, R. Hung, S. Gandikota, C. Chang, A. Brand","doi":"10.1109/VLSI-TSA.2012.6210155","DOIUrl":null,"url":null,"abstract":"Gate-first (GF) high-k metal gate (HKMG) for LSTP/LOP logic and DRAM periphery applications requires an efficient and low-cost effective work function (eWF) solution. We demonstrated TiAlN for pFET eWF tuning without appreciable EOT, Jg, and interface degradation. Hence TiAlN is shown to be a key enabler to realize process-friendly and cost-effective GF HKMG implementation.","PeriodicalId":388574,"journal":{"name":"Proceedings of Technical Program of 2012 VLSI Technology, System and Application","volume":"410 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-04-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Gate-first TiAlN P-gate electrode for cost effective high-k metal gate implementation\",\"authors\":\"C. Ni, X. Fu, N. Yoshida, O. Chan, M. Jin, H. Chen, S. Hung, R. Jakkaraju, S. Kesapragada, C. Lazik, R. Hung, S. Gandikota, C. Chang, A. Brand\",\"doi\":\"10.1109/VLSI-TSA.2012.6210155\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Gate-first (GF) high-k metal gate (HKMG) for LSTP/LOP logic and DRAM periphery applications requires an efficient and low-cost effective work function (eWF) solution. We demonstrated TiAlN for pFET eWF tuning without appreciable EOT, Jg, and interface degradation. Hence TiAlN is shown to be a key enabler to realize process-friendly and cost-effective GF HKMG implementation.\",\"PeriodicalId\":388574,\"journal\":{\"name\":\"Proceedings of Technical Program of 2012 VLSI Technology, System and Application\",\"volume\":\"410 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-04-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Technical Program of 2012 VLSI Technology, System and Application\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSI-TSA.2012.6210155\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Technical Program of 2012 VLSI Technology, System and Application","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-TSA.2012.6210155","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Gate-first TiAlN P-gate electrode for cost effective high-k metal gate implementation
Gate-first (GF) high-k metal gate (HKMG) for LSTP/LOP logic and DRAM periphery applications requires an efficient and low-cost effective work function (eWF) solution. We demonstrated TiAlN for pFET eWF tuning without appreciable EOT, Jg, and interface degradation. Hence TiAlN is shown to be a key enabler to realize process-friendly and cost-effective GF HKMG implementation.