HP-FLEXAR: A reconfigurable multi-unit heterogeneous topology architecture for time critical applications

The main objective of this paper is to present a newly developed high performance reconfigurable multitransputer heterogeneous topology architecture called HP-FLEXAR. The proposed architecture is aimed to be used for time critical applications, especially for performing such computational tasks which could be solved in separate heterogeneous topology execution units using parallel decomposition and allocation algorithms.

The HP-FLEXAR enables dynamic assignment of program tasks to the worker transputers of separate execution units. The heterogeneous topology of these units can be also dynamically changed (during a program execution) according to the run-time analysis performed in the HP-FLEXAR decision and distribution unit (a DD unit). A feedback between the execution and DD units is one of the most important features of the HP-FLEXAR architecture. This enables taking full advantage of its dynamic reconfiguration capabilities.

The HP-FLEXAR being a flexible architecture is not limited to the above applications. One of the other areas of its potential applications is support of development of architectural concepts and communication strategies aimed to increase the efficiency of reconfigurable multi-transputer systems. This can be achieved through direct mapping of different multi-transputer architectural designs onto the HP-FLEXAR structure.