深亚微米超大规模集成电路中多价值技术的挑战

T. Hanyu
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引用次数: 1

摘要

为了解决当前深亚微米VLSI中模块间的通信瓶颈,提出了一种基于多值浮栅MOS通管逻辑的内存逻辑VLSI结构。此外,还提出了一种基于双轨差分逻辑的多值电流模式电路,作为适用于自检和异步VLSI系统的候选电路。最后,通过设计实例说明了上述多值电路技术的优越性。
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Challenge of a multiple-valued technology in recent deep-submicron VLSI
A logic-in-memory VLSI architecture based on multiple-valued floating-gate MOS pass-transistor logic is proposed to solve a communication bottleneck between modules in the recent deep-submicron VLSI. Moreover, a multiple-valued current-mode circuit based on dual-rail differential logic is also proposed as a candidate suitable for self-checking and asynchronous VLSI systems. Finally, the advantage of the above multiple-valued circuit technologies is shown by using design examples.
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