Ultra-low-power design methodology for UWB low-noise amplifiers

In this paper, a design methodology to enhance the performance of low-noise amplifier (LNA) is presented. The methodology proposes a new operating parameter (OP) by using the drain-source saturation voltage (VDSsat) as an additional design parameter. This OP reaches a maximum value close to the threshold voltage (Vt) in moderate inversion region. A 3–5 GHz ultra-wideband (UWB) common gate design is used as an example to show the effectiveness of the proposed methodology. Simulation results show that the proposed methodology can reduce power consumption by 22% and increase the figure of merit (FoM) by 30% compared to traditional methodology, without having a significant effect on either noise figure (NF) or linearity characteristics.