{"title":"有源体偏置SOI-CMOS驱动电路","authors":"Wada, Ueda, Hirota, Hirano, Mashiko, Hamano","doi":"10.1109/VLSIC.1997.623786","DOIUrl":null,"url":null,"abstract":"Introduction SO1 devices operate faster and consume less power than bulk ones due to their small junction capacitances. However, this advantage decreases as the fan-outs get larger or metalwiring gets longer, because SO1 structures have lesser effects on gate capacitance or wiring capacitance. The body-bias controlled gate [l] shown in Fig.1 (a) can drive large load capacitances. However, this device cannot have the supply voltage of over the junction built-in voltage ( O N ) . The body-bias controlled gate with reverse-biased diodes [2] shown in Fig.1 (b) can operate stably with the supply voltage above the built-in voltage. However, the device operation becomes unstable at high-frequency because the excessive charges in the body cannot be discharged quickly as the diodes are reversely biased. We propose in this paper active body-bias SOI-CMOS driver circuits that can operate at high-speed and the supply voltage higher than the built-in voltage. This driver circuit, like the active pull-down scheme in ECL circuits [3], enhances its driving capability during the transition period. The circuit simulations indicated that the proposed circuit operates 55% faster than the bulk driver circuit at 0.8V and 60pF. Circuit Description Fig.2 shows the driver circuits we propose. The output inverter gate, one PMOS and one NMOS, is replaced with six transistors indicated in the broken-line box. The operation of the type-A circuit shown in Fig.2 (a) is as follows. When IN is \"L\", INB is \"H\" and OUT is \"L\". Transistor P1 is on and N1 is off. The feedback signal from OUT turns on P2 and turns off N2. When IN changes from \"L\" to \"H\", P1 turns off and N1 turns on. At this time, P3, P2 and N1 are all on and a DC current flows slightly through P3, P2 and N1, as shown in Fig.3, if we design the transistor P3 to be small. Then the body potential of the transistor P4 falls and the threshold voltage of P4 becomes smaller. Consequently OUT goes to \"H\" quickly. When OUT becomes \"H\", P2 turns off and N2 turns on. The DC current path is cut off and the body potential of P4 becomes the supply voltage level. Thus, the extra power consumptions are minimized in the circuit. In this driver, the body voltages of the output transistors can be adjusted below the built-in voltage if we optimize the transistor sizes of N2, N3, P2 and P3. The body regions of the output transistors are charged or discharged through the transistors, not through diodes. Therefore, the proposed circuit can operate at high-frequency even when the supply voltage exceeds the built-in voltage. In the type-B circuit shown in Fig.2 (b), the feedback signal is replaced by the output signal of the small-size inverter INV to obtain the longer period of the low threshold voltage of P4 or N4. Circuit Simulation Table 1 shows the device parameters of the SO1 and the bulk devices used for the circuit simulations. Fig.4 shows the operating waveforms of the bulk, the conventional SO1 and the type-A SO1 circuit at 1.OV and 60pF. The operating frequency is 100MHz. The body potential of the output transistor, P4 or N4, changes synchronously with the change of INB signal. Therefore, the transistor can drive the load capacitance quickly. As soon as OUT goes to \"H\" or \"L\", the body potential returns to its original state of the gnd or the supply voltage level. Fig.5 shows how the supply voltage affects the delay time and the power dissipation at 60pF. At the supply voltage of l.OV, the type-A SO1 circuit operates 23% faster than the conventional SO1 and 37% faster than the bulk. The extra power loss of the type-A SO1 circuit is 2.4% of the conventional SOI. Compared with the bulk, the type-A SO1 circuit has the 4.0% less power dissipation. As the supply voltage lowers, the advantages of the proposed circuits over the conventional SO1 increase. The type-A SO1 circuit runs 20% faster at 1.2V and 37% faster at 0.8V than the conventional SOI. Fig.6 shows how the load capacitance affects the delay time and the power dissipation at 1.OV. As the load capacitance increases, the advantages of the proposed circuits over the convcntional SO1 increase. The type-A SO1 circuit operates 24% faster at 20pF and 28% faster at lOOpF than the conventional SOI. Compared with the bulk, the type-A SO1 circuit operates 40% faster at 20pF and 36% faster at 100pF. As shown in Fig.5 and Fig.6, the type-B SO1 circuit operates faster than the type-A SO1 circuit. The type-B SO1 circuit operates 12% faster than the type-A SO1 circuit at 0.0' and 60pF. At the same conditions, type-B SO1 circuit operates 55% faster than the bulk circuit. Conclusion This paper describes active body-bias SOI-CMOS driver circuits that operate at high-speed and the supply voltage of over the built-in voltage. The proposed circuits show excellent speed performances over bulk ones even at large load capacitances by replacing the output inverter in driver circuits with the proposed ones. References [ I ] T. Fuse, et al, \"OSV SO1 CMOS Pass-Gate Logic,\" ISSCC Dig. Tech., pp. 88-89, 1996. [2] T. Douseki, et al, \"A 0.5V SIMOX-MTCMOS Circuit with 200ps Logic Gate,\" ISSCC Dig. Tech., pp. 88-89, 1996. [3] K. Ueda, N. Sasaki, H. Sato, and K. Mashiko, \"A Fully Compensated Active Pull-Down ECL Circuit with SelfAdjusting Driving Capability,\" IEEE J. Solid-Sfate Circuits, Vol. 31, NO. 1, pp. 46-53, 1996.","PeriodicalId":175678,"journal":{"name":"Symposium 1997 on VLSI Circuits","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Active Body-bias SOI-CMOS Driver Circuits\",\"authors\":\"Wada, Ueda, Hirota, Hirano, Mashiko, Hamano\",\"doi\":\"10.1109/VLSIC.1997.623786\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Introduction SO1 devices operate faster and consume less power than bulk ones due to their small junction capacitances. However, this advantage decreases as the fan-outs get larger or metalwiring gets longer, because SO1 structures have lesser effects on gate capacitance or wiring capacitance. The body-bias controlled gate [l] shown in Fig.1 (a) can drive large load capacitances. However, this device cannot have the supply voltage of over the junction built-in voltage ( O N ) . The body-bias controlled gate with reverse-biased diodes [2] shown in Fig.1 (b) can operate stably with the supply voltage above the built-in voltage. However, the device operation becomes unstable at high-frequency because the excessive charges in the body cannot be discharged quickly as the diodes are reversely biased. We propose in this paper active body-bias SOI-CMOS driver circuits that can operate at high-speed and the supply voltage higher than the built-in voltage. This driver circuit, like the active pull-down scheme in ECL circuits [3], enhances its driving capability during the transition period. The circuit simulations indicated that the proposed circuit operates 55% faster than the bulk driver circuit at 0.8V and 60pF. Circuit Description Fig.2 shows the driver circuits we propose. The output inverter gate, one PMOS and one NMOS, is replaced with six transistors indicated in the broken-line box. The operation of the type-A circuit shown in Fig.2 (a) is as follows. When IN is \\\"L\\\", INB is \\\"H\\\" and OUT is \\\"L\\\". Transistor P1 is on and N1 is off. The feedback signal from OUT turns on P2 and turns off N2. When IN changes from \\\"L\\\" to \\\"H\\\", P1 turns off and N1 turns on. At this time, P3, P2 and N1 are all on and a DC current flows slightly through P3, P2 and N1, as shown in Fig.3, if we design the transistor P3 to be small. Then the body potential of the transistor P4 falls and the threshold voltage of P4 becomes smaller. Consequently OUT goes to \\\"H\\\" quickly. When OUT becomes \\\"H\\\", P2 turns off and N2 turns on. The DC current path is cut off and the body potential of P4 becomes the supply voltage level. Thus, the extra power consumptions are minimized in the circuit. In this driver, the body voltages of the output transistors can be adjusted below the built-in voltage if we optimize the transistor sizes of N2, N3, P2 and P3. The body regions of the output transistors are charged or discharged through the transistors, not through diodes. Therefore, the proposed circuit can operate at high-frequency even when the supply voltage exceeds the built-in voltage. In the type-B circuit shown in Fig.2 (b), the feedback signal is replaced by the output signal of the small-size inverter INV to obtain the longer period of the low threshold voltage of P4 or N4. Circuit Simulation Table 1 shows the device parameters of the SO1 and the bulk devices used for the circuit simulations. Fig.4 shows the operating waveforms of the bulk, the conventional SO1 and the type-A SO1 circuit at 1.OV and 60pF. The operating frequency is 100MHz. The body potential of the output transistor, P4 or N4, changes synchronously with the change of INB signal. Therefore, the transistor can drive the load capacitance quickly. As soon as OUT goes to \\\"H\\\" or \\\"L\\\", the body potential returns to its original state of the gnd or the supply voltage level. Fig.5 shows how the supply voltage affects the delay time and the power dissipation at 60pF. At the supply voltage of l.OV, the type-A SO1 circuit operates 23% faster than the conventional SO1 and 37% faster than the bulk. The extra power loss of the type-A SO1 circuit is 2.4% of the conventional SOI. Compared with the bulk, the type-A SO1 circuit has the 4.0% less power dissipation. As the supply voltage lowers, the advantages of the proposed circuits over the conventional SO1 increase. The type-A SO1 circuit runs 20% faster at 1.2V and 37% faster at 0.8V than the conventional SOI. Fig.6 shows how the load capacitance affects the delay time and the power dissipation at 1.OV. As the load capacitance increases, the advantages of the proposed circuits over the convcntional SO1 increase. The type-A SO1 circuit operates 24% faster at 20pF and 28% faster at lOOpF than the conventional SOI. Compared with the bulk, the type-A SO1 circuit operates 40% faster at 20pF and 36% faster at 100pF. As shown in Fig.5 and Fig.6, the type-B SO1 circuit operates faster than the type-A SO1 circuit. The type-B SO1 circuit operates 12% faster than the type-A SO1 circuit at 0.0' and 60pF. At the same conditions, type-B SO1 circuit operates 55% faster than the bulk circuit. Conclusion This paper describes active body-bias SOI-CMOS driver circuits that operate at high-speed and the supply voltage of over the built-in voltage. The proposed circuits show excellent speed performances over bulk ones even at large load capacitances by replacing the output inverter in driver circuits with the proposed ones. References [ I ] T. Fuse, et al, \\\"OSV SO1 CMOS Pass-Gate Logic,\\\" ISSCC Dig. Tech., pp. 88-89, 1996. [2] T. Douseki, et al, \\\"A 0.5V SIMOX-MTCMOS Circuit with 200ps Logic Gate,\\\" ISSCC Dig. Tech., pp. 88-89, 1996. [3] K. Ueda, N. Sasaki, H. Sato, and K. Mashiko, \\\"A Fully Compensated Active Pull-Down ECL Circuit with SelfAdjusting Driving Capability,\\\" IEEE J. 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Introduction SO1 devices operate faster and consume less power than bulk ones due to their small junction capacitances. However, this advantage decreases as the fan-outs get larger or metalwiring gets longer, because SO1 structures have lesser effects on gate capacitance or wiring capacitance. The body-bias controlled gate [l] shown in Fig.1 (a) can drive large load capacitances. However, this device cannot have the supply voltage of over the junction built-in voltage ( O N ) . The body-bias controlled gate with reverse-biased diodes [2] shown in Fig.1 (b) can operate stably with the supply voltage above the built-in voltage. However, the device operation becomes unstable at high-frequency because the excessive charges in the body cannot be discharged quickly as the diodes are reversely biased. We propose in this paper active body-bias SOI-CMOS driver circuits that can operate at high-speed and the supply voltage higher than the built-in voltage. This driver circuit, like the active pull-down scheme in ECL circuits [3], enhances its driving capability during the transition period. The circuit simulations indicated that the proposed circuit operates 55% faster than the bulk driver circuit at 0.8V and 60pF. Circuit Description Fig.2 shows the driver circuits we propose. The output inverter gate, one PMOS and one NMOS, is replaced with six transistors indicated in the broken-line box. The operation of the type-A circuit shown in Fig.2 (a) is as follows. When IN is "L", INB is "H" and OUT is "L". Transistor P1 is on and N1 is off. The feedback signal from OUT turns on P2 and turns off N2. When IN changes from "L" to "H", P1 turns off and N1 turns on. At this time, P3, P2 and N1 are all on and a DC current flows slightly through P3, P2 and N1, as shown in Fig.3, if we design the transistor P3 to be small. Then the body potential of the transistor P4 falls and the threshold voltage of P4 becomes smaller. Consequently OUT goes to "H" quickly. When OUT becomes "H", P2 turns off and N2 turns on. The DC current path is cut off and the body potential of P4 becomes the supply voltage level. Thus, the extra power consumptions are minimized in the circuit. In this driver, the body voltages of the output transistors can be adjusted below the built-in voltage if we optimize the transistor sizes of N2, N3, P2 and P3. The body regions of the output transistors are charged or discharged through the transistors, not through diodes. Therefore, the proposed circuit can operate at high-frequency even when the supply voltage exceeds the built-in voltage. In the type-B circuit shown in Fig.2 (b), the feedback signal is replaced by the output signal of the small-size inverter INV to obtain the longer period of the low threshold voltage of P4 or N4. Circuit Simulation Table 1 shows the device parameters of the SO1 and the bulk devices used for the circuit simulations. Fig.4 shows the operating waveforms of the bulk, the conventional SO1 and the type-A SO1 circuit at 1.OV and 60pF. The operating frequency is 100MHz. The body potential of the output transistor, P4 or N4, changes synchronously with the change of INB signal. Therefore, the transistor can drive the load capacitance quickly. As soon as OUT goes to "H" or "L", the body potential returns to its original state of the gnd or the supply voltage level. Fig.5 shows how the supply voltage affects the delay time and the power dissipation at 60pF. At the supply voltage of l.OV, the type-A SO1 circuit operates 23% faster than the conventional SO1 and 37% faster than the bulk. The extra power loss of the type-A SO1 circuit is 2.4% of the conventional SOI. Compared with the bulk, the type-A SO1 circuit has the 4.0% less power dissipation. As the supply voltage lowers, the advantages of the proposed circuits over the conventional SO1 increase. The type-A SO1 circuit runs 20% faster at 1.2V and 37% faster at 0.8V than the conventional SOI. Fig.6 shows how the load capacitance affects the delay time and the power dissipation at 1.OV. As the load capacitance increases, the advantages of the proposed circuits over the convcntional SO1 increase. The type-A SO1 circuit operates 24% faster at 20pF and 28% faster at lOOpF than the conventional SOI. Compared with the bulk, the type-A SO1 circuit operates 40% faster at 20pF and 36% faster at 100pF. As shown in Fig.5 and Fig.6, the type-B SO1 circuit operates faster than the type-A SO1 circuit. The type-B SO1 circuit operates 12% faster than the type-A SO1 circuit at 0.0' and 60pF. At the same conditions, type-B SO1 circuit operates 55% faster than the bulk circuit. Conclusion This paper describes active body-bias SOI-CMOS driver circuits that operate at high-speed and the supply voltage of over the built-in voltage. The proposed circuits show excellent speed performances over bulk ones even at large load capacitances by replacing the output inverter in driver circuits with the proposed ones. References [ I ] T. Fuse, et al, "OSV SO1 CMOS Pass-Gate Logic," ISSCC Dig. Tech., pp. 88-89, 1996. [2] T. Douseki, et al, "A 0.5V SIMOX-MTCMOS Circuit with 200ps Logic Gate," ISSCC Dig. Tech., pp. 88-89, 1996. [3] K. Ueda, N. Sasaki, H. Sato, and K. Mashiko, "A Fully Compensated Active Pull-Down ECL Circuit with SelfAdjusting Driving Capability," IEEE J. Solid-Sfate Circuits, Vol. 31, NO. 1, pp. 46-53, 1996.