Vazgen Melikyan, Meruzhan K. Martirosyan, D. Babayan, V. Janpoladov, Davit Musayelyan
{"title":"基于14nm工艺的ORCA处理器多电压多阈值低功耗设计技术","authors":"Vazgen Melikyan, Meruzhan K. Martirosyan, D. Babayan, V. Janpoladov, Davit Musayelyan","doi":"10.1109/ELNANO.2018.8477510","DOIUrl":null,"url":null,"abstract":"This paper presents low power multi-voltage and multi-threshold techniques implementation based on 14-nanometer ORCA design with RISC core for reducing both static and dynamic power. The designed processor was compared with previous 32-nanometer low power based research and regular (without using low power techniques) 14-nanometer design to show the differences in power consumption after implementing multi-voltage and multi-threshold techniques.","PeriodicalId":269665,"journal":{"name":"2018 IEEE 38th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Multi-Voltage and Multi-Threshold Low Power Design Techniques for ORCA Processor Based on 14 nm Technology\",\"authors\":\"Vazgen Melikyan, Meruzhan K. Martirosyan, D. Babayan, V. Janpoladov, Davit Musayelyan\",\"doi\":\"10.1109/ELNANO.2018.8477510\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents low power multi-voltage and multi-threshold techniques implementation based on 14-nanometer ORCA design with RISC core for reducing both static and dynamic power. The designed processor was compared with previous 32-nanometer low power based research and regular (without using low power techniques) 14-nanometer design to show the differences in power consumption after implementing multi-voltage and multi-threshold techniques.\",\"PeriodicalId\":269665,\"journal\":{\"name\":\"2018 IEEE 38th International Conference on Electronics and Nanotechnology (ELNANO)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-04-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE 38th International Conference on Electronics and Nanotechnology (ELNANO)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ELNANO.2018.8477510\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 38th International Conference on Electronics and Nanotechnology (ELNANO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ELNANO.2018.8477510","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multi-Voltage and Multi-Threshold Low Power Design Techniques for ORCA Processor Based on 14 nm Technology
This paper presents low power multi-voltage and multi-threshold techniques implementation based on 14-nanometer ORCA design with RISC core for reducing both static and dynamic power. The designed processor was compared with previous 32-nanometer low power based research and regular (without using low power techniques) 14-nanometer design to show the differences in power consumption after implementing multi-voltage and multi-threshold techniques.
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