{"title":"用于RFID系统的2.4-2.5 GHz分数n频率合成器与集成VCO的0.18 um CMOS","authors":"D. Akhmetov, A. Korotkov, I. Rumyancev","doi":"10.1109/EEXPOLYTECH.2018.8564373","DOIUrl":null,"url":null,"abstract":"Paper presents simulation and measurement results of 2.4-2.5 GHz fractional-N frequency synthesizer with integrated voltage controlled oscillator, designed in a standard 0.18 um CMOS technology process, for RFID systems. Phase noise of the designed synthesizer is below −117 dBc/Hz at 1 MHz offset. The output power is −2 dBm, while spur level is below − 79 dBc. Chip area, occupied by the designed circuit, is 1.2 sq. mm.","PeriodicalId":296618,"journal":{"name":"2018 IEEE International Conference on Electrical Engineering and Photonics (EExPolytech)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"2.4-2.5 GHz Fractional-N Frequency Synthesizer with Integrated VCO in 0.18 um CMOS for RFID Systems\",\"authors\":\"D. Akhmetov, A. Korotkov, I. Rumyancev\",\"doi\":\"10.1109/EEXPOLYTECH.2018.8564373\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Paper presents simulation and measurement results of 2.4-2.5 GHz fractional-N frequency synthesizer with integrated voltage controlled oscillator, designed in a standard 0.18 um CMOS technology process, for RFID systems. Phase noise of the designed synthesizer is below −117 dBc/Hz at 1 MHz offset. The output power is −2 dBm, while spur level is below − 79 dBc. Chip area, occupied by the designed circuit, is 1.2 sq. mm.\",\"PeriodicalId\":296618,\"journal\":{\"name\":\"2018 IEEE International Conference on Electrical Engineering and Photonics (EExPolytech)\",\"volume\":\"53 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Conference on Electrical Engineering and Photonics (EExPolytech)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EEXPOLYTECH.2018.8564373\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Conference on Electrical Engineering and Photonics (EExPolytech)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EEXPOLYTECH.2018.8564373","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
摘要
本文介绍了采用标准0.18 um CMOS工艺设计的带集成压控振荡器的2.4-2.5 GHz分数n频率合成器用于RFID系统的仿真和测量结果。设计的合成器在1mhz偏移时相位噪声低于- 117 dBc/Hz。输出功率为−2dbm，杂散电平低于−79dbc。所设计的电路所占用的芯片面积为1.2平方。毫米。
2.4-2.5 GHz Fractional-N Frequency Synthesizer with Integrated VCO in 0.18 um CMOS for RFID Systems
Paper presents simulation and measurement results of 2.4-2.5 GHz fractional-N frequency synthesizer with integrated voltage controlled oscillator, designed in a standard 0.18 um CMOS technology process, for RFID systems. Phase noise of the designed synthesizer is below −117 dBc/Hz at 1 MHz offset. The output power is −2 dBm, while spur level is below − 79 dBc. Chip area, occupied by the designed circuit, is 1.2 sq. mm.
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