适用于低压闪存的高速编程和程序验证方法

Proceedings of 1994 IEEE Symposium on VLSI Circuits Pub Date : 1994-06-09 DOI:10.1109/VLSIC.1994.586214

T. Tanaka, M. Kato, T. Adachi, K. Ogura, K. Kimura, H. Kume

{"title":"适用于低压闪存的高速编程和程序验证方法","authors":"T. Tanaka, M. Kato, T. Adachi, K. Ogura, K. Kimura, H. Kume","doi":"10.1109/VLSIC.1994.586214","DOIUrl":null,"url":null,"abstract":"Three cffcctivc tcchniques arc proposed to achicve high-spccd programming and program-verify. A method of fixing the p-well bias for row sub-decoders allows the program-verify stage to follow the program stage wirhout an additional well-charging operation. By using an intemal program-end detection circuit, the completion of program mode is checked in one clock cycle, thus freeing the extemal processor from memory chips. The method of variable pulse width for programming reduces the total numser of verifications.","PeriodicalId":350730,"journal":{"name":"Proceedings of 1994 IEEE Symposium on VLSI Circuits","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"High-Speed Programming and Program-Verify Methods Suitable for Low-Voltage Flash Memories\",\"authors\":\"T. Tanaka, M. Kato, T. Adachi, K. Ogura, K. Kimura, H. Kume\",\"doi\":\"10.1109/VLSIC.1994.586214\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Three cffcctivc tcchniques arc proposed to achicve high-spccd programming and program-verify. A method of fixing the p-well bias for row sub-decoders allows the program-verify stage to follow the program stage wirhout an additional well-charging operation. By using an intemal program-end detection circuit, the completion of program mode is checked in one clock cycle, thus freeing the extemal processor from memory chips. The method of variable pulse width for programming reduces the total numser of verifications.\",\"PeriodicalId\":350730,\"journal\":{\"name\":\"Proceedings of 1994 IEEE Symposium on VLSI Circuits\",\"volume\":\"91 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1994 IEEE Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.1994.586214\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1994.586214","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 11

摘要

提出了三种有效的技术来实现高空间编程和程序验证。一种固定行子解码器的p井偏置的方法允许程序验证阶段跟随程序阶段，而无需额外的井充电操作。通过使用内部程序端检测电路，在一个时钟周期内检查程序模式的完成情况，从而将外部处理器从存储器芯片中解放出来。变脉宽的编程方法减少了验证的总次数。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

High-Speed Programming and Program-Verify Methods Suitable for Low-Voltage Flash Memories

Three cffcctivc tcchniques arc proposed to achicve high-spccd programming and program-verify. A method of fixing the p-well bias for row sub-decoders allows the program-verify stage to follow the program stage wirhout an additional well-charging operation. By using an intemal program-end detection circuit, the completion of program mode is checked in one clock cycle, thus freeing the extemal processor from memory chips. The method of variable pulse width for programming reduces the total numser of verifications.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of 1994 IEEE Symposium on VLSI Circuits

自引率

0.00%

发文量