{"title":"信号处理应用的适应性架构","authors":"M. Margala","doi":"10.1109/AHS.2006.14","DOIUrl":null,"url":null,"abstract":"In this paper, state-of-the-art reconfigurable architectures are reviewed and their main drawback in reaching TeraByte per second bandwidth is identified. A concept of new adaptable architecture for signal processing applications is proposed that will enable TB/s processing in the future. Current prototypes of smaller scale modules show groundbreaking benefits in reaching the targeted goal","PeriodicalId":232693,"journal":{"name":"First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Adaptable Architectures for Signal Processing Applications\",\"authors\":\"M. Margala\",\"doi\":\"10.1109/AHS.2006.14\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, state-of-the-art reconfigurable architectures are reviewed and their main drawback in reaching TeraByte per second bandwidth is identified. A concept of new adaptable architecture for signal processing applications is proposed that will enable TB/s processing in the future. Current prototypes of smaller scale modules show groundbreaking benefits in reaching the targeted goal\",\"PeriodicalId\":232693,\"journal\":{\"name\":\"First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06)\",\"volume\":\"62 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/AHS.2006.14\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AHS.2006.14","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Adaptable Architectures for Signal Processing Applications
In this paper, state-of-the-art reconfigurable architectures are reviewed and their main drawback in reaching TeraByte per second bandwidth is identified. A concept of new adaptable architecture for signal processing applications is proposed that will enable TB/s processing in the future. Current prototypes of smaller scale modules show groundbreaking benefits in reaching the targeted goal