低压半浮门二值到多值转换器和多值到二值转换器

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI:10.1109/ISMVL.2010.22

Y. Berg

{"title":"低压半浮门二值到多值转换器和多值到二值转换器","authors":"Y. Berg","doi":"10.1109/ISMVL.2010.22","DOIUrl":null,"url":null,"abstract":"In this paper we present low-voltage multiple-valued gates. The low voltage gates may operate at a supply voltage below 250mV. We utilize the ultra low voltage CMOS logic style [1][2] to implement simple multiple-valued circuits. The radix used is determined by the supply voltage and is limited to 4 for a supply voltage equal to 250mV . Simulated data presented are valid for a ST 90nm CMOS process.","PeriodicalId":447743,"journal":{"name":"2010 40th IEEE International Symposium on Multiple-Valued Logic","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2010-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Low Voltage Semi Floating-Gate Binary to Multiple-Value and Multiple-Value to Binary Converters\",\"authors\":\"Y. Berg\",\"doi\":\"10.1109/ISMVL.2010.22\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present low-voltage multiple-valued gates. The low voltage gates may operate at a supply voltage below 250mV. We utilize the ultra low voltage CMOS logic style [1][2] to implement simple multiple-valued circuits. The radix used is determined by the supply voltage and is limited to 4 for a supply voltage equal to 250mV . Simulated data presented are valid for a ST 90nm CMOS process.\",\"PeriodicalId\":447743,\"journal\":{\"name\":\"2010 40th IEEE International Symposium on Multiple-Valued Logic\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-05-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 40th IEEE International Symposium on Multiple-Valued Logic\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.2010.22\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 40th IEEE International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2010.22","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 8

摘要

本文提出了一种低压多值门器件。低压门可以在低于250mV的电源电压下工作。我们利用超低电压CMOS逻辑样式[1][2]来实现简单的多值电路。所使用的基数由电源电压决定，当电源电压等于250mV时，基数限制为4。所提出的模拟数据适用于ST 90nm CMOS工艺。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

Low Voltage Semi Floating-Gate Binary to Multiple-Value and Multiple-Value to Binary Converters

In this paper we present low-voltage multiple-valued gates. The low voltage gates may operate at a supply voltage below 250mV. We utilize the ultra low voltage CMOS logic style [1][2] to implement simple multiple-valued circuits. The radix used is determined by the supply voltage and is limited to 4 for a supply voltage equal to 250mV . Simulated data presented are valid for a ST 90nm CMOS process.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2010 40th IEEE International Symposium on Multiple-Valued Logic

自引率

0.00%

发文量

期刊最新文献

Toffoli Gate Implementation Using the Billiard Ball Model Queries with Multivalued Logic-Based Semantics for Imperfect Information Fusion On the Number of Products to Represent Interval Functions by SOPs with Four-Valued Variables Spectral Techniques: The First Decade of the XXI Century (Invited Paper) Efficient Simulation-Based Debugging of Reversible Logic