{"title":"电流转向DAC的非理想性分析","authors":"Wei Zhang, Ruoyuan Qu, Ming Zhu","doi":"10.1109/ICAIIS49377.2020.9194898","DOIUrl":null,"url":null,"abstract":"Some non-ideal factors during circuit design of current steering digital to analog converter (DAC) are analyzed and summarized in this paper. A 12-bit classic current steering DAC has been analyzed and effects of these non-ideal factors has been validated. Meanwhile, non-idealities are also double checked in post-layout simulation. The whole circuit has been taped out in TSMC 0.25um BCD process, test and simulation results are compared at last. The comparison results show that the non-ideal analysis can be used to estimate non-linearity of current steering DAC and guide the circuit design of DACs.","PeriodicalId":416002,"journal":{"name":"2020 IEEE International Conference on Artificial Intelligence and Information Systems (ICAIIS)","volume":"148 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Non-ideality Analysis of Current steering DAC\",\"authors\":\"Wei Zhang, Ruoyuan Qu, Ming Zhu\",\"doi\":\"10.1109/ICAIIS49377.2020.9194898\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Some non-ideal factors during circuit design of current steering digital to analog converter (DAC) are analyzed and summarized in this paper. A 12-bit classic current steering DAC has been analyzed and effects of these non-ideal factors has been validated. Meanwhile, non-idealities are also double checked in post-layout simulation. The whole circuit has been taped out in TSMC 0.25um BCD process, test and simulation results are compared at last. The comparison results show that the non-ideal analysis can be used to estimate non-linearity of current steering DAC and guide the circuit design of DACs.\",\"PeriodicalId\":416002,\"journal\":{\"name\":\"2020 IEEE International Conference on Artificial Intelligence and Information Systems (ICAIIS)\",\"volume\":\"148 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE International Conference on Artificial Intelligence and Information Systems (ICAIIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICAIIS49377.2020.9194898\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Conference on Artificial Intelligence and Information Systems (ICAIIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAIIS49377.2020.9194898","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Some non-ideal factors during circuit design of current steering digital to analog converter (DAC) are analyzed and summarized in this paper. A 12-bit classic current steering DAC has been analyzed and effects of these non-ideal factors has been validated. Meanwhile, non-idealities are also double checked in post-layout simulation. The whole circuit has been taped out in TSMC 0.25um BCD process, test and simulation results are compared at last. The comparison results show that the non-ideal analysis can be used to estimate non-linearity of current steering DAC and guide the circuit design of DACs.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
